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Gabriela NicolescuDépartement de génie informatique et génie logiciel
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Aurora Dugo, A. T., Lefoul, J.-B., Ben-Salem, A., Harnois, S., Göhring de Magalhães, F., & Nicolescu, G. (juin 2022). Efficient Scheduling, Mapping and Memory Bandwidth Allocation for Safety-Critical Systems [Communication écrite]. 20th IEEE International Interregional NEWCAS Conference (NEWCAS 2022), Quebec City, QC, Canada. Lien externe
Aurora Dugo, A. T., Lefoul, J.-B., Göhring de Magalhães, F., Nicolescu, G., & Assal, D. (juillet 2020). Qemtrace: A multi-platform memory tracer based on system emulation [Communication écrite]. 2020 Summer Computer Simulation Conference (SCSC 2020). Non disponible
Aurora Dugo, A. T., Lefoul, J.-B., Göhring de Magalhães, F., Assal, D., & Nicolescu, G. (2019). Cache locking content selection algorithms for ARINC-653 compliant RTOS. ACM Transactions on Embedded Computing Systems, 18(5), 1-20. Lien externe
Ayari, R., Hafnaoui, I., Beltrame, G., & Nicolescu, G. (2018). ImGA: an improved genetic algorithm for partitioned scheduling on heterogeneous multi-core systems. Design Automation for Embedded Systems, 22(1-2), 183-197. Lien externe
Ayari, R., Hafnaoui, I., Aguiar, A., Gilbert, P., Galibois, M., Rousseau, J.-P., Beltrame, G., & Nicolescu, G. (2018). Multi-objective mapping of full-mission simulators on heterogeneous distributed multi-processor systems. Journal of Defense Modeling and Simulation: Applications, Methodology, Technology, 15(4), 449-460. Lien externe
Ayari, R., Nikdast, M., Hafnaoui, I., Beltrame, G., & Nicolescu, G. (2017). HypAp: a Hypervolume-Based Approach for Refining the Design of Embedded Systems. IEEE Embedded Systems Letters, 9(3), 57-60. Lien externe
Ayari, R., Hafnaoui, I., Beltrame, G., & Nicolescu, G. (janvier 2016). Schedulability-Guided Crossover Operator for Real-Time Scheduling on Heterogeneous Multi-core Systems [Communication écrite]. IEEE International Symposium on Rapid System Prototyping, Pittsburg, Pennsylvania. Non disponible
Ayari, R., Hafnaoui, I., Beltrame, G., & Nicolescu, G. (octobre 2016). Schedulability-guided exploration of multi-core systems [Communication écrite]. 27th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype (RSP 2016), Pittsburgh, PA, United States. Lien externe
Ayari, R., Hafanaoui, I., Beltrame, G., & Nicolescu, G. (juillet 2016). Simulation-based schedulability assessment for real-time systems [Communication écrite]. Conference on Summer Computer Simulation (SCSC 2016), Montréal, Québec. Lien externe
Al-Akhras, S. I., Tahar, S., Nicolescu, G., Langevin, M., & Paulin, P. (décembre 2012). On the verification of a WiMax design using symbolic simulation [Communication écrite]. 4th International Symposium on Symbolic Computation in Software Science, Gammarth, Tunisia. Publié dans Electronic Proceedings in Theoretical Computer Science, 122. Disponible
Azzabi, A., Aboulhamid, E. M., & Nicolescu, G. (décembre 2010). Timing verification of cyclic systems based on temporal constraint analysis [Communication écrite]. 17th IEEE International Conference on Electronics, Circuits and Systems, Athens, Greece. Lien externe
Belkhiri, A., Ben Attia, M., De Magalhaes, F. G., & Nicolescu, G. (mai 2024). Towards Efficient Diagnosis of Performance Bottlenecks in Microservice-Based Applications (Work In Progress paper) [Communication écrite]. Companion of the 15th ACM/SPEC International Conference on Performance Engineering (ICPE 2024 - Companion), London, United Kingdom. Lien externe
Belkhiri, A., Shahnejat Bushehri, A., Göhring de Magalhães, F., & Nicolescu, G. (avril 2023). Transparent Trace Annotation for Performance Debugging in Microservice-oriented Systems (Work In Progress Paper) [Communication écrite]. ACM/SPEC International Conference on Performance Engineering - Companion (ICPE 2023), Coimbra, Portugal. Lien externe
Bushehri, A. S., Keivanpour, S., Azam, M., & Nicolescu, G. (décembre 2021). Anomalous energy detection for resource-constrained embedded systems using tracing data analysis [Communication écrite]. 2021 International Conference on Electrical, Computer, and Energy Technologies (ICECET 2021), Cape Town, South Africa (8 pages). Lien externe
Beltrame, G., Nicolescu, G., & Fossati, L. (2017). Modeling multiprocessor real-time systems at transaction level. Dans Real-Time Simulation Technologies: Principles, Methodologies, and Applications (p. 243-258). Lien externe
Benyoussef, M., Boland, J.-F., Nicolescu, G., Bois, G., & Hugues, J. (février 2014). Design space exploration: bridging the gap between high-level models and virtual execution platforms [Communication écrite]. Embedded Real Time System and Software Congress (ERTS2 2014), Toulouse, France (10 pages). Lien externe
Ben Cheikh, T. L., Nicolescu, G., Trajkovic, J., Bouchebaba, Y., & Paulin, P. (juin 2014). Fast and accurate implementation of Canny edge detector on embedded many-core platform [Communication écrite]. 12th IEEE International New Circuits and Systems Conference (NEWCAS 2014), Trois-Rivieres, QC, Canada. Lien externe
Beltrame, G., Nicolescu, G., & Fossati, L. (2012). Modeling Multiprocessor Real-Time Systems at Transaction Level. Dans Real-Time Simulation Technologies (Vol. 13, p. 243-258). Lien externe
Bouchebaba, Y., Ozcan, A.-E., Paulin, P., & Nicolescu, G. (juin 2010). MpAssign : a Framework for Solving the Many-Core Platform Mapping Problem [Communication écrite]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, Virginia. Publié dans Journal of Software: Practice and Experience, 42(7). Lien externe
Bouchebaba, Y., Paulin, P., & Nicolescu, G. (2012). MpAssign : a framework for solving the many-core platform mapping problem. Dans Design technology for heterogeneous embedded systems (p. 197-221). Lien externe
Beltrame, G., & Nicolescu, G. (mars 2011). A multi-objective decision-theoretic exploration algorithm for platform-based design [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe
Bensoudane, E., Tonietto, D., Gheorghe, L., & Nicolescu, G. (juin 2008). System-level design of continuous/discrete-time heterogeneous systems applied to high-speed serial link [Communication écrite]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2008). Lien externe
Briere, M., Girodias, B., Bouchebaba, Y., Nicolescu, G., Mieyeville, F., Gafflot, F., & O'Connor, I. (août 2007). Architectural exploration of optical and electrical interconnects in MPSoC [Communication écrite]. IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007), Montreal, QC, Canada (4 pages). Lien externe
Bouchebaba, Y., Girodias, B., Nicolescu, G., Coelho, F., & Aboulhamid, E. M. (septembre 2004). Buffer and register allocation for memory space optimization [Communication écrite]. IEEE 15th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2004), Galveston, Texas. Publié dans Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 49(1). Lien externe
Bouchhima, F., Nicolescu, G., Aboulhamid, E. M., & Abid, M. (2007). Generic Discrete-Continuous Simulation Model for Accurate Validation in Heterogeneous Systems Design. Microelectronics Journal, 38(6-7), 805-815. Lien externe
Bouchebaba, Y., Girodias, B., Nicolescu, G., Aboulhamid, E. M., Lavigueur, B., & Paulin, P. (2007). MPSoC memory optimization using program transformation. ACM Transactions on Design Automation of Electronic Systems, 12(4), 43-43. Lien externe
Briere, M., Girodias, B., Bouchebaba, Y., Nicolescu, G., Mieyeville, F., Gaffiot, F., & O'Connor, I. (avril 2007). System level assessment of an optical NoC in an MPSoC platform [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2007), Nice Acropolis, France. Lien externe
Bouchebaba, Y., Gagne, V., Nicolescu, G., & Aboulhamid, M. (juin 2006). SoC memory optimization using loop transformations [Communication écrite]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Lien externe
Bouchhima, F., Briere, M., Nicolescu, G., Abid, M., & Aboulhamid, E. M. (septembre 2006). A SystemC/Simulink co-simulation framework for continuous/discrete-events simulation [Communication écrite]. IEEE International Behavioral Modeling and Simulation Workshop, San Jose, CA, USA. Lien externe
Boyer, F.-R., Yang, L., Aboulamid, E. M., Charest, L., & Nicolescu, G. (décembre 2003). Multiple SimpleScalar Processors with Introspection, under SystemC [Communication écrite]. 46th IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2003), Cairo, Egypt. Lien externe
Cheikh, T. L. B., Aguiar, A., Tahar, S., & Nicolescu, G. (2015). Tuning framework for stencil computation in heterogeneous parallel platforms. Journal of Supercomputing, 72(2), 468-502. Lien externe
Cheikh, T. L. B., Beltrame, G., Nicolescu, G., Cheriet, F., & Tahar, S. (juin 2012). Parallelization strategies of the canny edge detector for multi-core CPUs and many-core GPUs [Communication écrite]. 10th IEEE International New Circuits and Systems Conference (NEWCAS 2012), Montréal, Québec. Lien externe
Calvez, J.-P., & Nicolescu, G. (2004). Spécification et modélisation des systèmes logiciels/matériels. Dans Jerraya, A.-A., & Nicolescu, G. (édit.), Spécification et validation des systèmes monopuces (p. 19-56). Lien externe
Destras, O., Le Beux, S., Göhring de Magalhães, F., & Nicolescu, G. (2024). Survey on activation functions for optical neural networks. ACM Computing Surveys, 56(2), 35 (30 pages). Disponible
De Magalhaes, F. G., Shafiee, A., Nicolescu, G., & Nikdast, M. (juillet 2024). Are Photonic Integrated Circuits (PICs) Secure? A Glance at Security Vulnerabilities in PICs [Communication écrite]. 2024 IEEE Photonics Society Summer Topicals Meeting Series (SUM 2024), Bridgetown, Barbados (2 pages). Lien externe
Destras, O., Beux, S. L., Gohring de Magalhaes, F., & Nicolescu, G. (juin 2024). Design of a Reconfigurable Activation Function for All-Optical Neural Networks [Communication écrite]. 22nd IEEE Interregional NEWCAS Conference (NEWCAS 2024), Sherbrooke, QC, Canada. Lien externe
El-Mahi, O., Pesant, G., Nicolescu, G., & Beltrame, G. (octobre 2013). Embedded system verification through constraint-based scheduling [Communication écrite]. International Symposium on Rapid System Prototyping (RSP 2013), Montréal, Québec, Canada. Lien externe
El-Mahi, O., Nicolescu, G., Pesant, G., & Beltrame, G. (novembre 2012). Embedded system verification through constraint-based scheduling [Communication écrite]. IEEE International High Level Design Validation and Test Workshop (HLDVT 2012), Huntington Beach, CA, USA. Lien externe
Fourmigue, A., Beltrame, G., & Nicolescu, G. (2016). Transient thermal simulation of liquid-cooled 3-D circuits. IEEE Transactions on Components, Packaging and Manufacturing Technology, 6(9), 1349-1360. Lien externe
Fourmigue, A., Beltrame, G., & Nicolescu, G. (mars 2014). Efficient transient thermal simulation of 3D ICs with liquid-cooling and through silicon vias [Communication écrite]. 17th Design, Automation and Test in Europe (DATE 2014), Dresden, Germany. Lien externe
Fourmigue, A., Beltrame, G., & Nicolescu, G. (mars 2013). Explicit transient thermal simulation of liquid-cooled 3D ICs [Communication écrite]. 16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013), Grenoble, France. Lien externe
Fourmigue, A., Girodias, B., Gheorghe, L., Nicolescu, G., & Aboulhamid, E. M. (2012). Wireless design platform combining simulation and testbed environments. Dans Design technology for heterogeneous embedded systems (p. 137-156). Lien externe
Fourmigue, A., Beltrame, G., Nicolescu, G., & Aboulhamid, E. M. (octobre 2011). A linear-time approach for the transient thermal simulation of liquid-cooled 3D ICs [Communication écrite]. 9th IEEE/ACM International Conference on Hardware/Software-Codesign and System Synthesis (CODES+ISSS 2011), part of Embedded Systems Week (ESWEEK 2011), Taipei, Taiwan. Lien externe
Fourmigue, A., Beltrame, G., Nicolescu, G., Aboulhamid, E. M., & O'Connor, I. (mars 2011). Multi-granularity thermal evaluation of 3D MPSoC architectures [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe
Fourmigue, A., Girodias, B., Nicolescu, G., & Aboulhamid, E. M. (avril 2009). Co-simulation based platform for wireless protocols design explorations [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2009), Nice, France. Lien externe
Gohring de Magalhaes, F., Nikdast, M., & Nicolescu, G. (août 2023). Integrated Photonic AI Accelerators Under Hardware Security Attacks: Impacts and Countermeasures [Communication écrite]. 66th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2023), Tempe, AZ, USA. Lien externe
Göhring de Magalhães, F., Nikdast, M., Hessel, F., Liboiron-Ladouceur, O., & Nicolescu, G. (octobre 2021). Hyco: A low-latency hybrid control plane for optical interconnection networks [Communication écrite]. 32nd IEEE International Workshop on Rapid System Prototyping (RSP 2021), Paris, France. Lien externe
Göhring de Magalhães, F., Hessel, F., Nikdast, M., Liboiron-Ladouceur, O., Xiong, Y., & Nicolescu, G. (mai 2018). Silicon photonic interconnects: Minimizing the controller latency [Communication écrite]. 28th Great Lakes Symposium on VLSI (GLSVLSI 2018), Chicago, IL. Lien externe
Gohring de Magalhaes, F., Nikdast, M., Hessel, F., Liboiron-Ladouceur, O., & Nicolescu, G. (2017). Optical interconnection network : the need for low-latency controllers. Dans Photonic interconnects for computing systems (33 pages). Lien externe
Göhring de Magalhães, F., Hessel, F., Liboiron-Ladouceur, O., & Nicolescu, G. (août 2016). Cluster-based architecture relying on optical integrated networks with the provision of a low-latency arbiter [Communication écrite]. 29th Symposium on Integrated Circuits and Systems Design (SBCCI 2016), Belo Horizonte, Brazil (6 pages). Lien externe
Göhring de Magalhães, F., Xiong, Y., Hessel, F., Liboiron-Ladouceur, O., & Nicolescu, G. (mai 2016). Co-design of an FPGA-based low-latency controller for MZI-based SiP switches [Communication écrite]. Photonics North 2016, Québec City, Québec (1 page). Lien externe
Göhring de Magalhães, F., Priti, R., Nikdast, M., Hessel, F., Liboiron-Ladouceur, O., & Nicolescu, G. (2016). Design and modelling of a low-latency centralized controller for optical integrated networks. IEEE Communications Letters, 20(3), 462-465. Lien externe
Göhring de Magalhães, F., Priti, R., Nikdast, M., Hessel, F., Liboiron-Ladouceur, O., & Nicolescu, G. (septembre 2015). A low-latency centralized controller for MZI-based optical integrated networks [Communication écrite]. International Conference on Photonics in Switching (PS 2015), Florence, Italy. Lien externe
Girodias, B., Iugan, L. G., Bouchebaba, Y., Nicolescu, G., Abouhamid, E. M., Langevin, M., & Paulin, P. (2012). Integrating memory optimization with mapping algorithms for multi-processors system-on-chip. Transactions on Embedded Computing Systems, 11(3), 1-26. Lien externe
Gaillardon, P.-E., Clermidy, F., O'Connor, I., Liu, J., Amadou, M., & Nicolescu, G. (2011). Matrix nanodevice-based logic architectures and associated functional mapping method. ACM Journal on Emerging Technologies in Computing Systems, 7(1), 1-23. Lien externe
Girodias, B., Gheorghe, L., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Langevin, M., & Paulin, P. (juin 2010). Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip [Communication écrite]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, VA, USA. Lien externe
Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Paulin, P., & Lavigueur, B. (2009). Multiprocessor, multithreading and memory optimization for on-chip multimedia applications. Journal of Signal Processing Systems, 57(2), 263-283. Lien externe
Gheorghe, L., Bouchhima, F., Nicolescu, G., & Boucheneb, H. (mars 2008). Semantics for model-based validation of continuous/discrete systems [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2008), Munich, Germany. Lien externe
Gheorghe, L., Bouchhima, F., Nicolescu, G., & Abid, M. (2007). Anatomy of a continuous/discrete system execution model for timed execution of heterogeneous systems. Dans Global Specification and Validation of Embedded Systems: Integrating Heterogeneous Components (p. 75-108). Lien externe
Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Paulin, P., & Lavigueur, B. (juin 2006). Application-level memory optimization for MPSoC [Communication écrite]. 17th IEEE International Workshop on Rapid System Prototyping, Chania, Crete, Greece. Lien externe
Gheorghe, L., Bouchhima, F., Nicolescu, G., & Boucheneb, H. (juin 2006). Formal definitions of simulation interfaces in a continuous/discrete co-simulation tool [Communication écrite]. 17th IEEE International Workshop on Rapid System Prototyping, Chania, Crete, Greece. Lien externe
Grou-Szabo, R., Ghattas, H., Savaria, Y., & Nicolescu, G. (juillet 2005). Component-Based Methodology for Hardware Design of a Dataflow Processing Network [Communication écrite]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005), Banff, Alberta, Canada. Lien externe
Gheorghe, L., & Nicolescu, G. (juillet 2005). Mp Socs Including Optical Interconnect. Technological Progresses and Challenges for CAD Tools Design [Communication écrite]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005), Banff, Alberta, Canada. Lien externe
Gorse, N., Metzger, M., Lapalme, J., Aboulhamid, E. M., Savaria, Y., & Nicolescu, G. (décembre 2004). Enhancing ESys.Net with a semi-formal verification layer [Communication écrite]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. Lien externe
Hafnaoui, I., Nicolescu, G., & Beltrame, G. (2019). Timing information propagation in interactive networks. Scientific Reports, 9(1), 4442 (14 pages). Disponible
Hafnaoui, I., Ayari, R., Nicolescu, G., & Beltrame, G. (2017). Scheduling real-time systems with cyclic dependence using data criticality. Design Automation for Embedded Systems, 21(2), 117-136. Disponible
Hafnaoui, I., Chen, C., Ayari, R., Nicolescu, G., & Beltrame, G. (octobre 2017). An analysis of random cache effects on real-time multi-core scheduling algorithms [Communication écrite]. 28th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype (RSP 2017), Seoul, South Korea. Lien externe
Hafnaoui, I., Ayari, R., Beltrame, G., & Nicolescu, G. (janvier 2016). Simulation-based Model Generator for Software Performance Estimation [Communication écrite]. IEEE International Symposium on Rapid System Prototyping, Pittsburg, Pennsylvania. Lien externe
Hafnaoui, I., Ayari, R., Nicolescu, G., & Beltrame, G. (juillet 2016). A simulation-based model generator for software performance estimation [Communication écrite]. 48th Summer Computer Simulation Conference (SCSC 2016), Montréal, Québec. Non disponible
Hui, L., Le Beux, S., Nicolescu, G., & O'Connor, I. (janvier 2015). Energy-efficient optical crossbars on chip with multi-layer deposited silicon [Communication écrite]. 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), Chiba, Japan. Lien externe
Hui, L., Fourmigue, A., Le Beux, S., Letartre, X., O'Connor, I., & Nicolescu, G. (mars 2015). Thermal aware design method for VCSEL-based on-chip optical interconnect [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2015), Grenoble, France. Lien externe
Hireche, N., Langlois, J. M. P., & Nicolescu, G. (août 2007). A systolic array for sequence comparison based on two logic levels processing element [Communication écrite]. IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007), Montréal, Québec. Lien externe
Hireche, N., Langlois, J. M. P., & Nicolescu, G. (mai 2006). Survey of biological high performance computing: Algorithms, implementations and outlook research [Communication écrite]. Canadian Conference on Electrical and Computer Engineering (CCECE 2006), Ottawa, Ontario. Lien externe
Iugan, L. G., Nicolescu, G., & O'Connor, I. (2016). Formalization for formal verification of an optical network-on-chip using DEVS. Dans Discrete-Event Modeling and Simulation: Theory and Applications (p. 293-306). Lien externe
Iugan, L. G., Boucheneb, H., & Nicolescu, G. (2015). A generic conceptual framework based on formal representation for the design of continuous/discrete co-simulation tools. Design Automation for Embedded Systems, 19(3), 243-275. Lien externe
Ignat, N., Nicolescu, B., Savaria, Y., & Nicolescu, G. Soft-Error Classification and Impact Analysis on Real-Time Operating Systems [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2006). Lien externe
Jaafar, F., Nicolescu, G., & Richard, C. (août 2016). A systematic approach for privilege escalation prevention [Communication écrite]. IEEE International Conference on Software Quality, Reliability and Security - Companion (QRS-C 2016), Vienne, Autriche. Lien externe
Jerraya, A.-A., & Nicolescu, G. (2004). Méthodes de validation pour systèmes hétérogènes. Dans Spécification et validation des systèmes monopuces (p. 57-100). Lien externe
Jerraya, A.-A., Nicolescu, G., & Yoo, S. (2004). Modèle de simulation pour logiciel et systèmes d'exploitation enfouis. Dans Spécification et validation des systèmes monopuces (p. 101-120). Lien externe
Kamkuimo, S. A., Göhring de Magalhães, F., Zrelli, R., Misson, H. A., Ben Attia, M., & Nicolescu, G. (2023). Decomposition and Modeling of the Situational Awareness of Unmanned Aerial Vehicles for Advanced Air Mobility. Drones, 7(8), 501-501. Disponible
Khaled, K., Dhaouadi, M., De Magalhaes, F. G., & Nicolescu, G. (décembre 2023). Efficient defense against model stealing attacks on convolutional neural networks [Communication écrite]. International Conference on Machine Learning and Applications (ICMLA 2023), Jacksonville, FL, USA. Lien externe
Khaled, K., Nicolescu, G., & Göhring de Magalhães, F. (août 2022). Careful what you wish for: On the extraction of adversarially trained models [Communication écrite]. 19th Annual International Conference on Privacy, Security and Trust (PST 2022), Fredericton, NB, Canada (10 pages). Lien externe
Lefoul, J.-B., Dugo, A. T. A., Göhring de Magalhães, F., Nicolescu, G., Assal, D., & Ulysse, N. (mai 2020). Simulator-based Framework towards Improved Cache Predictability for Multi-core Avionic System [Communication écrite]. Spring Simulation Conference (SpringSim 2020), Fairfax, Virginia (12 pages). Lien externe
Liboiron-Ladouceur, O., Göhring de Magalhães, F., Hessel, F., & Nicolescu, G. Modelling and simulation of optical integrated networks for early-stage design exploration (WIP) [Communication écrite]. 48th Summer Computer Simulation Conference (SCSC 2016), Montréal, Québec. Non disponible
Lugan, L. G., Nicolescu, G., & Boucheneb, H. (juillet 2016). Rollback-based simulation for the design of continuous/discrete simulation tools [Communication écrite]. 48th Summer Computer Simulation Conference (SCSC 2016), Montréal, Québec. Lien externe
Li, H., Fourmigue, A., Le Beux, S., O'Connor, I., & Nicolescu, G. (mars 2016). A thermal-Aware Laser Tuning Approach for Silicon Photonic Interconnects [Communication écrite]. 2nd International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS Workshop 2016), Dresden, Germany. Non disponible
Li, H., Fourmigue, A., Le Beux, S., O'Connor, I., & Nicolescu, G. (2016). Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser Tuning. IEEE Transactions on Emerging Topics in Computing, 6(3), 343-356. Lien externe
Le Beux, S., Li, H., O'Connor, I., Cheshmi, K., Liu, X., Trajkovic, J., & Nicolescu, G. (mars 2014). Chameleon: Channel efficient optical network-on-chip [Communication écrite]. 17th Design, Automation and Test in Europe (DATE 2014), Dresden, Germany. Lien externe
Le Beux, S., Li, H., Nicolescu, G., Trajkovic, J., & O'Connor, I. (2014). Optical crossbars on chip, a comparative study based on worst-case losses. Concurrency Computation Practice and Experience, 26(15), 2492-2503. Lien externe
Le Beux, S., Li, H., Nicolescu, G., & O'Connor, I. (mai 2014). A reconfigurable optical network on chip for streaming applications [Communication écrite]. 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC 2014), Montpellier, France (2 pages). Lien externe
Le Beux, S., O'Connor, I., Li, Z., Letartre, X., Monat, C., Trajkovic, J., & Nicolescu, G. (mai 2013). Potential and pitfalls of silicon photonics computing and interconnect [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2013), Beijing, China. Lien externe
Le Beux, S., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (2013). Reduction methods for adapting optical network on chip topologies to 3D architectures. Microprocessors and Microsystems, 37(1), 87-98. Lien externe
Le Beux, S., Trajkovic, J., O'Connor, I., & Nicolescu, G. (octobre 2011). Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC) [Communication écrite]. 19th IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC 2011), Kowloon, Hong kong. Lien externe
Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (mars 2011). Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe
Le Beux, S., Bois, G., Nicolescu, G., Bouchebaba, Y., Langevin, M., & Paulin, P. (2010). Combining mapping and partitioning exploration for NoC-based embedded systems. Journal of Systems Architecture, 56(7), 223-232. Lien externe
Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (2010). Multi-optical network-on-chip for large scale MPSoC. IEEE Embedded Systems Letters, 2(3), 77-80. Lien externe
Le Beux, S., Nicolescu, G., Bois, G., & Paulin, P. (mai 2010). A system-level exploration flow for optical network on chip (ONoC) in 3D MPSoC [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2010), Paris, France. Lien externe
Le Beux, S., Nicolescu, G., Bois, G., Bouchebaba, Y., Langevin, M., & Paulin, P. (juillet 2009). Optimizing configuration and application mapping for MPSoC architectures [Communication écrite]. NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2009), San Francisco, California. Lien externe
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., & Rousseau, F. (2007). Separating Modeling and Simulation Aspects in Hardware/Software Framework-Based Modeling Languages. Arabian Journal for Science and Engineering, 32(2C), 41-60. Lien externe
Lapalme, J., Aboulhamid, E. M., & Nicolescu, G. (2006). A new efficient EDA tool design methodology. ACM Transactions on Embedded Computing Systems, 5(2), 408-430. Lien externe
Lapalme, J., Aboulhamed, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (juin 2004). Esys.net: A New Solution for Embedded Systems Modeling and Simulation [Communication écrite]. ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2004), Washington, D.C.. Publié dans ACM Sigplan Notices, 39(7). Lien externe
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (février 2004). [dot]Net framework - A solution for the next generation tools for system-level modeling and simulation [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2004), Paris, France. Lien externe
Misson, H. A., Zrelli, R., Ben Attia, M., Gohring de Magalhaes, F., & Nicolescu, G. (septembre 2023). ReDaML: a modeling language for DO-178C high-level requirements in airspace systems [Communication écrite]. 34th International Workshop on Rapid System Prototyping (RSP 2023), Hamburg, Germany (7 pages). Lien externe
Magalhaes, F. G., Nikdast, M., & Nicolescu, G. (septembre 2023). SerIOS: Enhancing Hardware Security in Integrated Optoelectronic Systems [Communication écrite]. 34th International Workshop on Rapid System Prototyping (RSP 2023), Hamburg, Germany. Lien externe
Messoussi, O., Göhring de Magalhães, F., Lamarre, F., Perreault, F., Sogoba, I., Bilodeau, G.-A., & Nicolescu, G. (octobre 2021). Vehicle Detection and Tracking from Surveillance Cameras in Urban Scenes [Communication écrite]. 16th International Symposium on Visual Computing (ISVC 2021). Lien externe
Nicolescu, G., Tria, A., Fernandez, J. M., Marion, J.-Y., & García-Alfaro, J. (décembre 2020). Foundations and Practice of Security [Communication écrite]. 13th International Symposium on Foundations and Practice of Security (FPS 2020), Montréal, Québec. Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (mai 2018). DeEPeR: Enhancing performance and reliability in chip-Scale optical interconnection networks [Communication écrite]. 28th Great Lakes Symposium on VLSI (GLSVLSI 2018), Chicago, IL. Lien externe
Nikdast, M., Nicolescu, G., & Liboiron-Ladouceur, O. (juin 2018). Improving Microresonators Reliability in Silicon Photonic Integrated Circuits [Communication écrite]. 7th Annual IEEE Photonics Society Optical Interconnects Conference (OI 2018), Santa Fe, NM. Lien externe
Nicolescu, G., & Mosterman, P. J. (2018). Model-Based Design for Embedded Systems. Lien externe
Nicolescu, G., & Nicolescu, B. (2017). Method for securing an application and data. (Demande de brevet no US20170134379). Lien externe
Nikdast, M., Nicolescu, G., Le Beux, S., & Xu, J. (édit.) (2017). Photonic interconnects for computing systems: Understanding and pushing design challenges. Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (mai 2016). An analytical study of process variations in silicon photonic integrated circuits [Communication écrite]. Photonics North 2016, Québec City, Québec (2 pages). Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (2016). Chip-scale silicon photonic interconnects: A formal study on fabrication non-uniformity. Journal of Lightwave Technology, 34(16), 3682-3695. Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (août 2016). Enabling efficient tolerance analysis in silicon photonic integrated circuits [Résumé]. Progress in Electromagnetics Research Symposium (PIERS 2016), Shanghai, China. Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (mars 2016). Modeling fabrication non-uniformity in chip-scale silicon photonic interconnects [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2016), Dresden, Germany. Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (mars 2016). Photonic integrated circuits: a study on process variations [Communication écrite]. Optical Fiber Communications Conference and Exhibition (OFC 2016), Piscataway, NJ, USA (3 pages). Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (novembre 2015). Silicon photonic integrated circuits under process variations [Communication écrite]. Asia Communications and Photonics Conference (ACPC 2015), Hong Kong. Lien externe
Nicolescu, G., O'Connor, I., & Piguet, C. (2012). Design technology for heterogeneous embedded systems. Lien externe
Nicolescu, G., & Jerraya, A. A. (2007). Anatomy of a hardware/software execution model in heterogeneous systems. Dans Global Specification and Validation of Embedded Systems: Integrating Heterogeneous Components (p. 59-74). Lien externe
Nicolescu, G., & Jerraya, A. A. (2007). Heterogeneous systems validation based on execution models. Dans Global Specification and Validation of Embedded Systems: Integrating Heterogeneous Components (p. 47-57). Lien externe
Nicolescu, G., & Jerraya, A. A. (2007). Methodology for heterogeneous systems validation. Dans Global Specification and Validation of Embedded Systems: Integrating Heterogeneous Components (p. 109-145). Lien externe
Nicolescu, B., Ignat, N., Savaria, Y., & Nicolescu, G. (2006). Analysis of real-time systems sensitivity to transient faults using MicroC kernel. IEEE Transactions on Nuclear Science, 53(4), 1902-1909. Lien externe
Nicolescu, G., Bouchhima, F., & Gheorghe, L. (juin 2006). CODIS - a framework for continuous/discrete systems co-simulation [Communication écrite]. 2nd IFAC Conference on Analysis and Design of Hybrid Systems (ADHS 2006), Alghero, Italy. Publié dans IFAC Proceedings Volumes, 39(5). Lien externe
Nicolescu, B., Ignat, N., Savaria, Y., & Nicolescu, G. (septembre 2005). Sensitivity of real-time operating systems to transient faults : A cause study for microC kernel [Communication écrite]. 8th European Conference on Radiation and its Effects on Components and Systems (RADECS 2005). Lien externe
O'Connor, I., Liu, J., Kotb, J., Yakymets, N., Daviot, R., Navarro, D., Gaillardon, P.-E., Clermidy, F., Amadou, M., & Nicolescu, G. (octobre 2009). Emerging Technologies and Nanoscale Computing Fabrics [Communication écrite]. 17th IFIP WH 10.5/IEEE International Conference on Very Large Scale Integration (BLSI-SoC 2009), Florianopolis, Brazil (20 pages). Lien externe
O'Connor, I., Mieyeville, F., Gaffiot, F., Scandurra, A., & Nicolescu, G. (octobre 2008). Can integrated photonics solve MPSoC interconnect issues? [Communication écrite]. 25th International VLSI Multilevel Interconnection Conference (VMIC 2008), Fremont, CA, United states. Non disponible
Panerati, J., Gianoli, L., Pinciroli, C., Shabah, A., Nicolescu, G., & Beltrame, G. (mai 2018). From Swarms to Stars: Task Coverage in Robot Swarms with Connectivity Constraints [Communication écrite]. IEEE International Conference on Robotics and Automation (ICRA 2018), Brisbane, Australia. Lien externe
Provost, S., Lavigueur, B., Bois, G., & Nicolescu, G. Integration of Configurable Processors in a Multiprocessor Platform [Communication écrite]. IEEE International SOC Conference (SOCC 2006). Lien externe
Paulin, P. G., Pilkington, C., Langevin, M., Bensoudane, E., Lyonnard, D., Benny, O., Lavigueur, B., Lo, D., Beltrame, G., Gagné, V., & Nicolescu, G. (2006). Parallel Programming Models for a Multiprocessor Soc Platform Applied to Networking and Multimedia. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 14(7), 667-680. Lien externe
Shahnejat Bushehri, A., Amirnia, A., Belkhiri, A., Keivanpour, S., De Magalhaes, F. G., & Nicolescu, G. (2024). Deep Learning-Driven Anomaly Detection for Green IoT Edge Networks. IEEE Transactions on Green Communications and Networking, 8(1), 498-513. Lien externe
Silva-Pinto, N.-G., Gagnon, M., Obas, H., Ouattara, J.-Y. S., & Nicolescu, G. (avril 2024). Onto-by-wire: Bridging the knowledge gap between avionics and cybersecurity through ontology [Communication écrite]. 24th Integrated Communications, Navigation and Surveillance Conference (ICNS 2024), Herndon, VA, USA (11 pages). Lien externe
Stephenne, C., Ouattara, J.-Y., de Magalhaes, F., Jean, M., Nicolescu, G., Cuppens, F., & Fernandez, J. (septembre 2023). Security assessment of a commercial router using physical access: a case study [Communication écrite]. 34th International Workshop on Rapid System Prototyping (RSP 2023), Hamburg, Germany (7 pages). Lien externe
Sreemathy Raj, A., Tenison, I., Khaled, K., Gohring de Magalhaes, F., & Nicolescu, G. (novembre 2022). FedSHIBU : federated similarity-based head independent body update [Affiche]. International Workshop on Federated Learning : Recent Advances and New Challenges (FL 2022), New Orleans, LA, USA. Lien externe
Sanz, V., Jafer, S., Wainer, G., Nicolescu, G., Urquia, A., & Dormido, S. (mars 2009). Hybrid modeling of opto-electrical interfaces using DEVS and modelica [Communication écrite]. DEVS Integrative M and S Symposium (DEVS 2009), part of the 2009 Spring Simulation Multiconference (SpringSim 2009), San Diego, CA, United states. Lien externe
Torres Aurora Dugo, A., Lefoul, J.-B., Gohring de Magalhaes, F., Nicolescu, G., & Harnois, S. (juin 2022). Certifiable memory management system for safety critical partitioned system [Communication écrite]. 11th European Congress Embedded Real Time Systems (ERTS 2022), Toulouse, France (12 pages). Lien externe
Trajkovic, J., Abdi, S., Nicolescu, G., & Gajski, D. D. (2012). Automated generation of custom processor core from C code. Journal of Electrical and Computer Engineering, 2012, 1-26. Disponible
Wang, Y., Aouina, A., Li, H., O' Connor, I., Nicolescu, G., & Le Beux, S. (2019). Thermal-Aware Design Method for Laser Group Control in Nanophotonic Interconnects. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27(3), 742-746. Lien externe
Xiong, Y., Göhring de Magalhães, F., Nicolescu, G., Hessel, F., & Liboiron-Ladouceur, O. (mars 2017). Co-design of a Low-latency Centralized Controller for Silicon Photonic Multistage MZI-based Switches [Communication écrite]. Optical Fiber Communications Conference and Exhibition (OFC 2017), Los Angeles, CA (3 pages). Lien externe
Xiong, Y., Göhring de Magalhães, F., Radi, B., Nicolescu, G., Hessel, F., & Liboiron-Ladouceur, O. (mars 2016). Towards a fast centralized controller for integrated silicon photonic multistage MZI-based switches [Communication écrite]. Optical Fiber Communications Conference and Exhibition (OFC 2016), Anaheim, CA (3 pages). Lien externe
Yacoub, A., Nicolescu, G., Hamri, M. E.-A., & Frydman, C. (juillet 2018). Towards using devs for modelling adaptive storytelling in virtual games [Communication écrite]. 50th Summer Computer Simulation Conference (SCSC 2018), Bordeaux, France. Lien externe
Zrelli, R., Amaral Misson, H., Ben Attia, M., Gohring de Magalhães, F., Shabah, A., & Nicolescu, G. Natural2CTL: A Dataset for Natural Language Requirements and Their CTL Formal Equivalents [Communication écrite]. 30th International Working Conference on Requirement Engineering : Foundation for Software Quality (REFSQ 2024), Winterthur, Switzerland. Lien externe
