Salvador Mir, Benoît Charlot, Gabriela Nicolescu
, Pascal Coste, Fabien Parrain, Nacer Eddine Zergainoh, Bernard Courtois, Ahmed-Amine Jerraya and Márta Rencz
Paper (2000)
Document published while its authors were not affiliated with Polytechnique Montréal
An external link is available for this item
| ISBN: | 1581132514 |
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| PolyPublie URL: | https://publications.polymtl.ca/74317/ |
| Conference Title: | Great Lakes Symposium on VLSI (GLSVLSI 2000) |
| Conference Location: | Chicago, IL, USA |
| Conference Date(s): | 2000-03-02 - 2000-03-04 |
| Publisher: | Association for Computing Machinery |
| DOI: | 10.1145/330855.330950 |
| Official URL: | https://doi.org/10.1145/330855.330950 |
| Date Deposited: | 28 Apr 2026 15:49 |
| Last Modified: | 28 Apr 2026 15:49 |
| Cite in APA 7: | Mir, S., Charlot, B., Nicolescu, G., Coste, P., Parrain, F., Zergainoh, N. E., Courtois, B., Jerraya, A.-A., & Rencz, M. (2000, March). Towards design and validation of mixed-technology SOCs [Paper]. Great Lakes Symposium on VLSI (GLSVLSI 2000), Chicago, IL, USA. https://doi.org/10.1145/330855.330950 |
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