Documents publiés en "2005"

B

Bui, H. T., & Savaria, Y. (juillet 2005). Design and analysis of XOR gates for high-speed and low-jitter applications [Communication écrite]. 9th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI 2005), Orlando, Floride. Non disponible

Bui, H. T., & Savaria, Y. (juillet 2005). A Generic Method for Embedded Measurement and Compensation of Process and Temperature Variations in Socs [Communication écrite]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005), Banff, Alberta, Canada. Lien externe

Bui, H. T., & Savaria, Y. (juin 2005). High-speed differential frequency-to-voltage converter [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005). Lien externe

C

Castonguay, A., & Savaria, Y. (juin 2005). A Hypertransport Chip-to-Chip Interconnect Tunnel Developed Using Systemc [Communication écrite]. 16th International Workshop on Rapid System Prototyping, Montréal, Québec. Lien externe

Catudal, S., Cantin, M. A., & Savaria, Y. (mai 2005). Parameters Estimation Applied to Automatic Video Processing Algorithms Validation [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe

Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. (2005). Scheduling and Optimal Register Placement for Synchronous Circuits Derived Using Software Pipelining Techniques. ACM Transactions on Design Automation of Electronic Systems, 10(2), 187-204. Lien externe

Chebli, R., Sawan, M., & Savaria, Y. (décembre 2005). Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results [Communication écrite]. IEEE International Conference on Electronics, Circuits and Systems (ICECS 2005), Tunisie. Lien externe

Chebli, R., Sawan, M., & Savaria, Y. (août 2005). A programmable positive and negative high-voltage DC-DC converter dedicated for ultrasonic applications [Communication écrite]. 48th Midwest Symposium on Circuits and Systems (MWSCAS 2005), Cincinnati, Ohio. Lien externe

Chureau, A., Savaria, Y., & Aboulhamid, E. M. (mars 2005). The Role of Model-Level Transactors and Uml in Functional Prototyping of Systems-on-Chip: a Software-Radio Application [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2005), Munich, Germany. Lien externe

D

Dang, H., Sawan, M., & Savaria, Y. (mai 2005). A Novel Approach for Implementing Ultra-High Speed Flash Adc Using Mcml Circuits [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe

Deca, R., Mahrez, O., Cherkaoui, O., Savaria, Y., & Slone, D. (août 2005). Contributions to automated testing of network service interactions [Communication écrite]. 5e Colloque International sur les nouvelles technologies de la répartition (NOTERE 2005), Gatineau, Québec. Non disponible

Dubois, M., Savaria, Y., & Bois, G. (avril 2005). A Generic Ahb Bus for Implementing High-Speed Locally Synchronous Islands [Communication écrite]. IEEE SoutheastCon 2004, Fort Lauderdale, Florida, USA. Lien externe

E

Epassa, H. G., Boyer, F.-R., & Savaria, Y. (mai 2005). Implementation of a Cycle by Cycle Variable Speed Processor [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe

G

Grou-Szabo, R., Ghattas, H., Savaria, Y., & Nicolescu, G. (juillet 2005). Component-Based Methodology for Hardware Design of a Dataflow Processing Network [Communication écrite]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005), Banff, Alberta, Canada. Lien externe

H

Hashemi, S., Sawan, M., & Savaria, Y. (décembre 2005). Modeling power budget requirements of implantable electronic devices [Communication écrite]. IEEE International Conference on Electronics, Circuits and Systems (ICECS 2005), Tunisie. Lien externe

K

Khali, H., Savaria, Y., & Houle, J.-L. (2005). A system level implementation strategy and partitioning algorithm for applications based on lookup tables. International Journal of Computer and Electrical Engineering, 31(7), 485-502. Lien externe

L

Landry, A., Nekili, M., & Savaria, Y. (mai 2005). A novel 2 GHz Mulit-layer AMBA high-Speed bus interconnect matrix for SoC platforms [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe

Landry, A., Savaria, Y., & Nekili, M. (juin 2005). Circuits techniques for a 2 GHz AMBA AHB Bus [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005), Québec, QC, Canada. Lien externe

Ling, W., & Savaria, Y. (mars 2005). Analysis of Wave-Pipelined Domino Logic Circuit and Clocking Styles Subject to Parametric Variations [Communication écrite]. 6th International Symposium on Quality Electronic Design, San Jose, California. Lien externe

M

Mahoney, P., Savaria, Y., Bois, G., & Plante, P. (juin 2005). Parallel hashing memories : an alternative to content addressable memories [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005), Québec, QC, Canada. Lien externe

Marche, D., Savaria, Y., & Gagnon, Y. (mai 2005). A New Switch Compensation Technique for Inverted R-2r Ladder Dacs [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe

Mbaye, M., Bélanger, N., Savaria, Y., & Pierre, S. (mai 2005). Application Specific Instruction-Set Processor Generation for Video Processing Based on Loop Optimization [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe

Morin, D., Savaria, Y., & Sawan, M. (juin 2005). A 200 MSPS 10-bit pipelined ADC using digital calibration [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005), Québec City, Que., Canada. Lien externe

N

Naderi, A. H., Sawan, M., & Savaria, Y. (juin 2005). A 1-mW 2-GHz Q-enhanced LC bandpass filter for low-power RF applications [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005). Lien externe

Nicolescu, B., Gorse, N., Savaria, Y., Aboulhamid, E. M., & Velazco, R. (2005). On the Use of Model Checking for the Verification of a Dynamic Signature Monitoring Approach. IEEE Transactions on Nuclear Science, 52(5), 1555-1561. Lien externe

Nicolescu, B., Ignat, N., Savaria, Y., & Nicolescu, G. (septembre 2005). Sensitivity of real-time operating systems to transient faults : A cause study for microC kernel [Communication écrite]. 8th European Conference on Radiation and its Effects on Components and Systems (RADECS 2005). Lien externe

P

Pontikakis, B., Boyer, F.-R., & Savaria, Y. (juillet 2005). Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period [Communication écrite]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005), Banff, Alberta, Canada. Lien externe

Provost, G., Cantin, M. A., Sawan, M., Cardinal, C., Savaria, Y., & Haccoun, D. (mai 2005). Fast parameters optimization of an iterative decoder using a configurable hardware accelerator [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japon. Lien externe

R

Rioux, S., Lacourse, A., Ducharme, M., Gagnon, Y., Savaria, Y., & Meunier, M. (mai 2005). Design methods for CMOS low-current finely tunable voltage references covering a wide output range [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Japon. Lien externe

S

Saheb, J. F., Richard, J.-F., Meingan, R., Sawan, M., & Savaria, Y. (juin 2005). System integration of high voltage electrostatic MEMS Actuators [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005), Québec, Canada. Lien externe

Salomon, M. E., Khouas, A., & Savaria, Y. (mai 2005). A Complete Spurs Distribution Model for Direct Digital Period Synthesizers [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe

Sawan, M., Djemouai, A., El-Sankary, K., Dang, H., Naderi, A., Savaria, Y., & Gagnon, F. (juin 2005). High speed ADCs dedicated for wideband wireless receivers [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005), Québec, QC, Canada. Lien externe

W

Wild, G., Savaria, Y., & Meunier, M. (mai 2005). Characterization of Laser-Induced Photoexcitation Effect on a Surrounding CMOS Ring Oscillator [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. Lien externe