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Application Specific Instruction-Set Processor Generation for Video Processing Based on Loop Optimization

M. Mbaye, N. Bélanger, Yvon Savaria and Samuel Pierre

Paper (2005)

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Additional Information: Nom historique du département: Département de génie informatique
Department: Department of Computer Engineering and Software Engineering
Department of Electrical Engineering
PolyPublie URL: https://publications.polymtl.ca/23870/
Conference Title: IEEE International Symposium on Circuits and Systems (ISCAS 2005)
Conference Location: Kobe, Japan
Conference Date(s): 2005-05-23 - 2005-05-26
Publisher: IEEE
DOI: 10.1109/iscas.2005.1465387
Official URL: https://doi.org/10.1109/iscas.2005.1465387
Date Deposited: 18 Apr 2023 15:18
Last Modified: 25 Sep 2024 16:03
Cite in APA 7: Mbaye, M., Bélanger, N., Savaria, Y., & Pierre, S. (2005, May). Application Specific Instruction-Set Processor Generation for Video Processing Based on Loop Optimization [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. https://doi.org/10.1109/iscas.2005.1465387

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