B. Pontikakis, François-Raymond Boyer
and Yvon Savaria
Paper (2005)
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| Additional Information: | Nom historique du département: Département de génie informatique |
|---|---|
| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/23777/ |
| Conference Title: | 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005) |
| Conference Location: | Banff, Alberta, Canada |
| Conference Date(s): | 2005-07-20 - 2005-07-24 |
| Publisher: | IEEE Computer Society |
| DOI: | 10.1109/iwsoc.2005.90 |
| Official URL: | https://doi.org/10.1109/iwsoc.2005.90 |
| Date Deposited: | 18 Apr 2023 15:18 |
| Last Modified: | 25 Sep 2024 16:03 |
| Cite in APA 7: | Pontikakis, B., Boyer, F.-R., & Savaria, Y. (2005, July). Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period [Paper]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005), Banff, Alberta, Canada. https://doi.org/10.1109/iwsoc.2005.90 |
|---|---|
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