R. Chebli, Mohamad Sawan and Yvon Savaria
Paper (2005)
An external link is available for this itemDepartment: | Department of Electrical Engineering |
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PolyPublie URL: | https://publications.polymtl.ca/24293/ |
Conference Title: | IEEE International Conference on Electronics, Circuits and Systems (ICECS 2005) |
Conference Location: | Tunisie |
Conference Date(s): | 2005-12-11 - 2005-12-14 |
Publisher: | Institute of Electrical and Electronics Engineers |
DOI: | 10.1109/icecs.2005.4633435 |
Official URL: | https://doi.org/10.1109/icecs.2005.4633435 |
Date Deposited: | 18 Apr 2023 15:18 |
Last Modified: | 08 Apr 2025 02:12 |
Cite in APA 7: | Chebli, R., Sawan, M., & Savaria, Y. (2005, December). Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results [Paper]. IEEE International Conference on Electronics, Circuits and Systems (ICECS 2005), Tunisie. https://doi.org/10.1109/icecs.2005.4633435 |
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