H. G. Epassa, François-Raymond Boyer
and Yvon Savaria
Paper (2005)
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| Additional Information: | Nom historique du département: Département de génie informatique |
|---|---|
| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/24181/ |
| Conference Title: | IEEE International Symposium on Circuits and Systems (ISCAS 2005) |
| Conference Location: | Kobe, Japan |
| Conference Date(s): | 2005-05-23 - 2005-05-26 |
| Publisher: | IEEE |
| DOI: | 10.1109/iscas.2005.1465342 |
| Official URL: | https://doi.org/10.1109/iscas.2005.1465342 |
| Date Deposited: | 18 Apr 2023 15:18 |
| Last Modified: | 25 Sep 2024 16:03 |
| Cite in APA 7: | Epassa, H. G., Boyer, F.-R., & Savaria, Y. (2005, May). Implementation of a Cycle by Cycle Variable Speed Processor [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. https://doi.org/10.1109/iscas.2005.1465342 |
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