Documents publiés en "1995"

A

Assi, A., & Kaminska, B. (mars 1995). Modeling of communication protocols in VHDL [Communication écrite]. 5th Great Lakes Symposium on VLSI, Buffalo, NY, USA. Lien externe

Ayari, B., Ben Hamida, N., & Kaminska, B. (mars 1995). Automatic test vector generation for mixed-signal circuits [Communication écrite]. European Conference on Design and Test (EDTC 1995), Paris, France. Lien externe

B

Bechir, A., & Kaminska, B. (avril 1995). BDD_FTEST: fast, backtrack-free test generator based on binary decision diagram representation [Communication écrite]. 1995 IEEE International Symposium on Circuits and Systems-ISCAS 95, Seattle, WA, USA. Non disponible

Bechir, A., & Kaminska, B. (1995). CYCLOGEN: Automatic, functional-level test generator based on the cyclomatic complexity measure and on the ROBDD representation. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 42(7), 446-452. Lien externe

Boubezari, S., & Kaminska, B. (1995). Deterministic built-in self-test generator based on cellular automata structures. IEEE Transactions on Computers, 44(6), 805-816. Lien externe

Boubezari, S., & Kaminska, B. (avril 1995). Mixed deterministic and pseudorandom test vector generator based on cellular automata structures [Communication écrite]. 1995 IEEE International Symposium on Circuits and Systems-ISCAS 95, Seattle, WA, USA. Lien externe

F

Fares, M., & Kaminska, B. (1995). FPAD: a fuzzy nonlinear programming approach to analog circuit design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14(7), 785-793. Lien externe

G

Gadiri, A., Savaria, Y., & Kaminska, B. (septembre 1995). Optimized CMOS compatible photoreceiver [Communication écrite]. Canadian Conference on Electrical and Computer Engineering (CCECE 1995), Montréal, QC, Canada. Lien externe

K

Khaled, S., Kaminska, B., Courtois, B., & Lubaszewski, M. (avril 1995). Frequency-based BIST for analog circuit testing [Communication écrite]. 13th IEEE VLSI Test Symposium, Princeton, NJ, USA. Lien externe

L

Lejmi, S., Kaminska, B., & Ayari, B. (avril 1995). Retiming for BIST-sequential circuits [Communication écrite]. 1995 IEEE International Symposium on Circuits and Systems-ISCAS 95, Seattle, WA, USA. Lien externe

Lejmi, S., Kaminska, B., & Ayari, B. (avril 1995). Retiming, resynthesis, and partitioning for the pseudo-exhaustive testing of sequential circuits [Communication écrite]. 13th IEEE VLSI Test Symposium, Princeton, NJ, USA. Lien externe

Lejmi, S., Kaminska, B., & Ayari, B. (octobre 1995). Synthesis and retiming for the pseudo-exhaustive BIST of synchronous sequential circuits [Communication écrite]. 1995 26th International Test Conference, Washington, DC, USA. Lien externe

R

Rzeszut, J., Kaminska, B., & Savaria, Y. (novembre 1995). New method for testing mixed analog and digital circuits [Communication écrite]. 4th Asian Test Symposium, Bangalore, India. Lien externe

S

Slamani, M., & Kaminska, B. (1995). Multifrequency analysis of faults in analog circuits. IEEE Design & Test of Computers, 12(2), 70-80. Lien externe

Soufi, M., Savaria, Y., & Kaminska, B. (avril 1995). On the design of at-speed testable VLSI circuits [Communication écrite]. 13th IEEE VLSI Test Symposium, Princeton, NJ, USA. Lien externe

Soufi, M., Savaria, Y., & Kaminska, B. (avril 1995). On Using partial reset for pseudo-random testing [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 1995), Seattle, WA, USA. Lien externe

Soufi, M., Savaria, Y., Darlay, F., & Kaminska, B. (1995). Producing reliable initialization and test of sequential circuits with pseudorandom vectors. IEEE Transactions on Computers, 44(10), 1251-1256. Lien externe