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Boland, J. F., Chureau, A., Thibeault, C., Savaria, Y., Gagnon, F., & Zilic, Z. (juin 2004). An efficient methodology for design and verification of an equalizer for a software defined radio [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Boudjella, A., Jin, Z., & Savaria, Y. (2004). Electrical Field Analysis of Nanoscale Field Effect Transistors. Japanese Journal of Applied Physics, 43(6), 3831-3837. Lien externe
Bougataya, M., Lakhasasi, A., Savaria, Y., & Massicotte, D. (mai 2004). Thermo-mechanical stress analysis of VLSI devices by partially coupled finite element method [Communication écrite]. 18th Annual Canadian Conference on Electrical and Computer Engineering (CCEC 2004), Niagara Falls, Ontario. Lien externe
Boyer, F.-R., Epassa, H. G., Pontikakis, B., Savaria, Y., & Ling, W. (juin 2004). A variable period clock synthesis (VPCS) architecture for next-generation power-aware SoC applications [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Bui, H. T., & Savaria, Y. (juillet 2004). 10 GHz PLL using active shunt-peaked MCML gates and improved frequency acquisition XOR phase detector in 0.18 mu m CMOS [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe
Bui, H. T., & Savaria, Y. (mai 2004). Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detector [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, BC, Canada. Lien externe
Bui, T., & Savaria, Y. (juin 2004). Shunt-peaking of MCML gates using active inductors [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Calbaza, D. E., Cordos, I., Seth-Smith, N., & Savaria, Y. (mai 2004). An Adpll Circuit Using a Ddps for Genlock Applications [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2004). Lien externe
Cantin, M. A., Regimbal, S., Catudal, S., & Savaria, Y. (2004). A Unified Environment to Assess Image Quality in Video Processing. Journal of Circuits, Systems and Computers, 13(6), 1289-1306. Lien externe
Cantin, M. A., Savaria, Y., & Velazco, R. (2004). An automatic word length determination method. WSEAS Transactions on Information Science & Applications, 1(5), 1440-1448. Non disponible
Catudal, S., Cantin, M.-A., & Savaria, Y. (2004). Performance driven validation applied to video processing. WSEAS Transactions on Electronics, 1(3), 568-575. Non disponible
Chureau, A., Savaria, Y., & Aboulhamid, E. M. (juillet 2004). Interface-based design of systems-on-chip using UML-RT [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe
Dubois, M., Bois, G., & Savaria, Y. (2004). Double profiling methodology for video processing platform. WSEAS Transactions on Computers, 3(6), 1802-1807. Non disponible
Dubois, M., Savaria, Y., & Haccoun, D. (juin 2004). On low power shift register hardware realizations for convolutional encoders and decoders [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Duval, O., & Savaria, Y. (mai 2004). An on-chip delay measurements module for nanostructures characterization [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, BC, Canada. Lien externe
Duval, O., Lafrance, L. P., Savaria, Y., & Desjardins, P. (août 2004). An Integrated Test Platform for Nanostructure Electrical Characterization [Communication écrite]. International Conference on Mems, Nano and Smart Systems (ICMENS 2004), Banff, Canada. Lien externe
Gorse, N., Aboulhamid, E. M., & Savaria, Y. (juillet 2004). Consistency validation of high-level requirements [Communication écrite]. 4th International Workshop on System on Chip for Real Time Applications (IWSOC 2004), Banff, AB, Canada. Lien externe
Gorse, N., Bélanger, P., Aboulhamid, E. M., & Savaria, Y. (décembre 2004). Mixing linguistic and formal techniques for high-level requirements engineering [Communication écrite]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. Lien externe
Gorse, N., Metzger, M., Lapalme, J., Aboulhamid, E. M., Savaria, Y., & Nicolescu, G. (décembre 2004). Enhancing ESys.Net with a semi-formal verification layer [Communication écrite]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. Lien externe
Granger, E., Catudal, S., Grou, R., Mbaye, M. M., & Savaria, Y. (septembre 2004). On current strategies for hardware acceleration of digital image restoration filters [Communication écrite]. 4th WSEAS International Conference on Signal, Speech and Image Processing (ICOSSIP 2004), Izmir, Turquie. Lien externe
Hasan, S. K., Landry, A., Savaria, Y., & Nekili, M. (juin 2004). Design constraints of hypertransport-compatible networks-on-chip [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, QC, Canada. Lien externe
Hashemi, S., Sawan, M., & Savaria, Y. (juin 2004). Characterization of Stress Induced Defects in Deep Sub-Micron MOSFETS [Communication écrite]. 2nd Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Huang, Z., Savaria, Y., & Sawan, M. (juin 2004). Robust design of a dynamically controlled low-power level-up shifter operating up to 300V [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Izouggaghen, B., Khouas, A., & Savaria, Y. (mai 2004). Spurs modeling in direct digital period synthesizers related to phase accumulator truncation [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, BC, Canada. Lien externe
Jiang, Y. T., Wang, Y. K., Song, X. Y., & Savaria, Y. (2004). Computation of Signal Output Probability for Boolean Functions Represented by Obdd. Computers & Mathematics With Applications, 47(12), 1865-1874. Lien externe
Jin, Z.-F., Yang, M., Savaria, Y., & Wu, K. (juillet 2004). Analysis of gate modulation in nanoscale field effect transistors using an equivalent substrate integrated waveguide (SIW) model [Communication écrite]. 10th International Symposium on Antenna Technology and Applied Electromagnetics and URSI Conference (ANTEM/URSI 2004), Ottawa, Ont., Canada. Lien externe
Lafrance, L.-P., & Savaria, Y. (juillet 2004). A framework for implementing reusable digital signal processing modules [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada (4 pages). Lien externe
Landry, A., Savaria, Y., & Nekili, M. (décembre 2004). A beyond-1 GHz high-speed bus for SoC DSP platforms [Communication écrite]. 16th International Conference on Microelectronics (ICM 2004), Tunis, Tunisia. Lien externe
Layachi, M., Savaria, Y., & Rochefort, A. The Effect of Pi-Coupling on the Electronic Properties of 1,4-Dithiol Benzene Stacking [Communication écrite]. International Conference on Mems, Nano and Smart Systems (ICMENS 2004). Lien externe
Ling, W., & Savaria, Y. (juillet 2004). Variable-precision multiplier for equalizer with adaptive modulation [Communication écrite]. 47th Midwest Symposium on Circuits and Systems (MWSCAS 2004), Hiroshima, Japon. Lien externe
Morin, D., Normandin, F., Grandmaison, M. E., Dang, H., Savaria, Y., & Sawan, M. (juillet 2004). An intellectual property module for auto-calibration of time-interleaved pipelined analog-to-digital converters [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe
Nicolescu, B., Gorse, N., Savaria, Y., Aboulhamid, E. M., & Velazco, R. (septembre 2004). Validating a dynamic signature monitoring approach using the LTL model checking technique [Communication écrite]. Workshop on Radiation Effects on Components and Systems (RADECS 2004), Madrid, Espagne. Non disponible
Nicolescu, B., Savaria, Y., & Velazco, R. (juillet 2004). Performance evaluation and failure rate prediction for the soft implemented error detection technique [Communication écrite]. 10th IEEE International On-Line Testing Symposium, Funchal, Madeira Island, Portugal. Lien externe
Nicolescu, B., Savaria, Y., & Velazco, R. (2004). Software detection mechanisms providing full coverage against single bit-flip faults. IEEE Transactions on Nuclear Science, 51(6), 3510-3518. Lien externe
Nsame, P., & Savaria, Y. (juillet 2004). A customizable embedded SoC platform architecture [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe
Nsame, P., & Savaria, Y. (septembre 2004). Multi-processor SoC integration: a case study on BlueGene [Communication écrite]. IEEE International SOC Conference (SOCC 2004). Lien externe
Peterson, K., & Savaria, Y. (mai 2004). Assertion-based on-line verification and debug environment for complex hardware systems [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, BC, Canada. Lien externe
Regimbal, S., Savaria, Y., & Bois, G. (juillet 2004). Verification strategy determination using dependence analysis of transaction-level models [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe
Richard, J.-F., & Savaria, Y. (juin 2004). High voltage charge pump using standard CMOS technology [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Robert, M., Savaria, Y., & Wang, C. (juin 2004). Analysis of metrics used to compare analog-to-digital converters [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Tanguay, B., Savaria, Y., & Sawan, M. (décembre 2004). Accelerating equalization algorithms using the Xtensa configurable processor [Communication écrite]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. Lien externe
Tohio, B., Pierre, S., Savaria, Y., & Mbaye, M. M. (mai 2004). Protocol convertibility in network processing environments [Communication écrite]. 6th WSEAS International Conference on Telecommunications and Informatics (TELE-INFO 2004), Cancun, Mexico. Publié dans WSEAS Transactions on Communications, 3(1). Non disponible
Zhengrong, H., Savaria, Y., & Sawan, M. (juillet 2004). A dynamically controlled and refreshed low-power level-up shifter [Communication écrite]. 47th Midwest Symposium on Circuits and Systems (MWSCAS 2004), Hiroshima, Japon. Lien externe
