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10 GHz PLL using active shunt-peaked MCML gates and improved frequency acquisition XOR phase detector in 0.18 mu m CMOS

Hung Tien Bui and Yvon Savaria

Paper (2004)

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Department: Department of Electrical Engineering
ISBN: 0769521827
PolyPublie URL: https://publications.polymtl.ca/25229/
Conference Title: 4th IEEE International Workshop on System-on-Chip for Real-Time Applications
Conference Location: Banff, Alta., Canada
Conference Date(s): 2004-07-19 - 2004-07-21
Publisher: IEEE Comput. Soc
DOI: 10.1109/iwsoc.2004.1319861
Official URL: https://doi.org/10.1109/iwsoc.2004.1319861
Date Deposited: 18 Apr 2023 15:19
Last Modified: 08 Apr 2025 02:14
Cite in APA 7: Bui, H. T., & Savaria, Y. (2004, July). 10 GHz PLL using active shunt-peaked MCML gates and improved frequency acquisition XOR phase detector in 0.18 mu m CMOS [Paper]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. https://doi.org/10.1109/iwsoc.2004.1319861

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