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Berrima, S., Blaquiere, Y., & Savaria, Y. (2021). Ring-Oscillator Based High Accuracy Low Complexity Multichannel Time-to-Digital Converter Architecture for Field-Programmable Gate Arrays. IEEE Transactions on Instrumentation and Measurement, 70, 1-10. External link
Berrima, S., Blaquiere, Y., & Savaria, Y. (2020). Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA. IET Circuits Devices & Systems, 14(8), 1243-1252. External link
Berrima, S., Blaquière, Y., & Savaria, Y. (2018). Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits. Integration, 62, 159-169. External link
Blaquiere, Y., Basile-Bellavance, Y., Berrima, S., & Savaria, Y. (2014, June). Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2014), Melbourne, VIC, Australia (4 pages). External link
Berrima, S. (2014). Algorithmes de diagnostic d'une chaîne JTAG reconfigurable et tolérante aux pannes au sein de la technologie WaferIC [Master's thesis, École Polytechnique de Montréal]. Available
Berrima, S. (2021). Convertisseurs temps-numérique distribués et à mesures multiples pour FPGA [Ph.D. thesis, Polytechnique Montréal]. Available
