Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA

Safa Berrima, Yves Blaquière and Yvon Savaria

Article (2020)

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Department:	Department of Electrical Engineering
PolyPublie URL:	https://publications.polymtl.ca/46997/
Journal Title:	IET Circuits Devices & Systems (vol. 14, no. 8)
Publisher:	IET
DOI:	10.1049/iet-cds.2020.0026
Official URL:	https://doi.org/10.1049/iet-cds.2020.0026
Date Deposited:	18 Apr 2023 15:00
Last Modified:	08 Apr 2025 07:13

Cite in APA 7:	Berrima, S., Blaquière, Y., & Savaria, Y. (2020). Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA. IET Circuits Devices & Systems, 14(8), 1243-1252. https://doi.org/10.1049/iet-cds.2020.0026
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