Safa Berrima, Yves Blaquière and Yvon Savaria
Paper (2017)
An external link is available for this item
| Department: | Department of Electrical Engineering |
|---|---|
| ISBN: | 9781509063895 |
| PolyPublie URL: | https://publications.polymtl.ca/38607/ |
| Conference Title: | 60th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2017) |
| Conference Location: | Boston, MA |
| Conference Date(s): | 2017-08-06 - 2017-08-09 |
| Publisher: | IEEE |
| DOI: | 10.1109/mwscas.2017.8053074 |
| Official URL: | https://doi.org/10.1109/mwscas.2017.8053074 |
| Date Deposited: | 18 Apr 2023 15:04 |
| Last Modified: | 08 Apr 2025 12:22 |
| Cite in APA 7: | Berrima, S., Blaquière, Y., & Savaria, Y. (2017, August). Sub-ps resolution programmable delays implemented in a Xilinx FPGA [Paper]. 60th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2017), Boston, MA. https://doi.org/10.1109/mwscas.2017.8053074 |
|---|---|
Statistics
Dimensions
Repository Staff Only
|
View Item |
