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Ammar, M., Bany Hamad, G., Mohamed, O. A., & Savaria, Y. (2017). System-Level Analysis of the Vulnerability of Processors Exposed to Single Event Upsets via Probabilistic Model Checking. IEEE Transactions on Nuclear Science, 64(9), 2523-2530. Lien externe
Ammar, M., Bany Hamad, G., Mohamed, O. A., Savaria, Y., & Velazco, R. (septembre 2016). Comprehensive vulnerability analysis of systems exposed to SEUs via probabilistic model checking [Communication écrite]. 16th European Conference on Radiation and Its Effects on Components and Systems (RADECS 2016), Bremen, Germany (4 pages). Lien externe
Bany Hamad, G. (2017). Multilevel Modeling, Formal Analysis, and Characterization of Single Event Transients Propagation in Digital Systems [Thèse de doctorat, École Polytechnique de Montréal]. Disponible
Bany Hamad, G., Ait Mohamed, O., & Savaria, Y. (2017). Formal Methods Based Synthesis of Single Event Transient Tolerant Combinational Circuits. Journal of Electronic Testing: Theory and Applications, 33(5), 607-620. Lien externe
Bany Hamad, G., Kazma, G., Mohamed, O. A., & Savaria, Y. (juillet 2017). Comprehensive analysis of sequential circuits vulnerability to transient faults using SMT [Communication écrite]. 23rd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2017), Thessaloniki, Greece. Lien externe
Bany Hamad, G., Mohamed, O. A., & Savaria, Y. (septembre 2016). Investigating the efficiency of cell level hardening techniques of single event transients via SMT [Communication écrite]. 16th European Conference on Radiation and Its Effects on Components and Systems (RADECS 2016), Bremen, Germany (4 pages). Lien externe
Kazma, G., Bany Hamad, G., Ait Mohamed, O., & Savaria, Y. (juin 2017). Analysis of SEU propagation in sequential circuits at RTL using Satisfiability Modulo Theories [Communication écrite]. 15th IEEE International New Circuits and Systems Conference (NEWCAS 2017), Strasbourg, France. Lien externe
Kazma, G., Bany Hamad, G., Mohamed, O. A., & Savaria, Y. (mai 2017). Analysis of SEU Propagation in Combinational Circuits at RTL Based on Satisfiability Modulo Theories [Communication écrite]. Great Lakes Symposium on VLSI (GLSVLSI 2017), Banff, Alberta. Lien externe