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Items where Author is "Pontikakis, Bill"

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Number of items: 5.

Elbediwy, M., Pontikakis, B., Ghaffari, A., David, J.-P., & Savaria, Y. (2024). DR-PIFO: a dynamic ranking packet scheduler using a push-in-first-out queue. IEEE Transactions on Network and Service Management, 21(1), 355-371. External link

Elbediwy, M., Pontikakis, B., David, J. P., & Savaria, Y. (2023). A Hardware Architecture of a Dynamic Ranking Packet Scheduler for Programmable Network Devices. IEEE Access, 11, 61422-61436. Available

Su, M., David, J. P., Savaria, Y., Pontikakis, B., & Luinaud, T. (2022, May). An FPGA-based HW/SW Co-Verification Environment for Programmable Network Devices [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2022), Austin, TX, USA. External link

Hasan, S. R., Pontikakis, B., & Savaria, Y. (2009, May). An all-digital skew-adaptive clock scheduling algorithm for heterogeneous multiprocessor systems on chips (MPSoCs) [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2009), Taipei, Taiwan. External link

Pontikakis, B., Bui, H. T., Boyer, F.-R., & Savaria, Y. (2007, May). A low-complexity high-speed clock generator for dynamic frequency scaling of FPGA and standard-cell based designs [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, Louisiana. External link

List generated on: Tue Jul 23 08:16:22 2024 EDT