A low-complexity high-speed clock generator for dynamic frequency scaling of FPGA and standard-cell based designs

Bill Pontikakis, Hung Tien Bui, François-Raymond Boyer and Yvon Savaria

Paper (2007)

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Department:	Department of Electrical Engineering Department of Computer Engineering and Software Engineering
PolyPublie URL:	https://publications.polymtl.ca/21503/
Conference Title:	IEEE International Symposium on Circuits and Systems (ISCAS 2007)
Conference Location:	New Orleans, Louisiana
Conference Date(s):	2007-05-27 - 2007-05-30
Publisher:	Institute of Electrical and Electronics Engineers
DOI:	10.1109/iscas.2007.378817
Official URL:	https://doi.org/10.1109/iscas.2007.378817
Date Deposited:	18 Apr 2023 15:17
Last Modified:	25 Sep 2024 16:00

Cite in APA 7:	Pontikakis, B., Bui, H. T., Boyer, F.-R., & Savaria, Y. (2007, May). A low-complexity high-speed clock generator for dynamic frequency scaling of FPGA and standard-cell based designs [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, Louisiana. https://doi.org/10.1109/iscas.2007.378817
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