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Items where Author is "Ayari, Bechir"

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Jump to: 1996 | 1995 | 1994
Number of items: 6.

1996

Ayari, B. (1996). Génération de vecteurs de test pour les circuits combinatoires, séquentiels et mixtes basée sur le OBDD [Ph.D. thesis, École Polytechnique de Montréal]. Available

Ben-Hamida, N., Ayari, B., & Kaminska, B. (1996, October). Testing of embedded A/D converters in mixed-signal circuit [Paper]. 1996 International Conference on Computer Design, ICCD'96, Austin, TX, USA. External link

1995

Lejmi, S., Kaminska, B., & Ayari, B. (1995, April). Retiming for BIST-sequential circuits [Paper]. 1995 IEEE International Symposium on Circuits and Systems-ISCAS 95, Seattle, WA, USA. External link

Lejmi, S., Kaminska, B., & Ayari, B. (1995, April). Retiming, resynthesis, and partitioning for the pseudo-exhaustive testing of sequential circuits [Paper]. 13th IEEE VLSI Test Symposium, Princeton, NJ, USA. External link

Lejmi, S., Kaminska, B., & Ayari, B. (1995, October). Synthesis and retiming for the pseudo-exhaustive BIST of synchronous sequential circuits [Paper]. 1995 26th International Test Conference, Washington, DC, USA. External link

1994

Ayari, B., & Kaminska, B. (1994). New dynamic test vector compaction for automatic test pattern generation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 13(3), 353-358. External link

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