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Bouchebaba, Y., Girodias, B., Nicolescu, G., Coelho, F., & Aboulhamid, E. M. (2007). Buffer and register allocation for memory space optimization. Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 49(1), 123-138. Presented at IEEE 15th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2004), Galveston, Texas. External link
Bouchebaba, Y., Girodias, B., Nicolescu, G., Aboulhamid, E. M., Lavigueur, B., & Paulin, P. (2007). MPSoC memory optimization using program transformation. ACM Transactions on Design Automation of Electronic Systems, 12(4), 43-43. External link
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., & Rousseau, F. (2007). Separating Modeling and Simulation Aspects in Hardware/Software Framework-Based Modeling Languages. Arabian Journal for Science and Engineering, 32(2C), 41-60. External link
Lapalme, J., Aboulhamid, E. M., & Nicolescu, G. (2006). A new efficient EDA tool design methodology. ACM Transactions on Embedded Computing Systems, 5(2), 408-430. External link
Chevalier, J. M., De Nanclas, M., Filion, L., Benny, O., Rondonneau, M., Bois, G., & Aboulhamid, E. M. (2006). A Systemc Refinement Methodology for Embedded Software. IEEE Design & Test of Computers, 23(2), 148-158. External link
Nicolescu, B., Gorse, N., Savaria, Y., Aboulhamid, E. M., & Velazco, R. (2005). On the Use of Model Checking for the Verification of a Dynamic Signature Monitoring Approach. IEEE Transactions on Nuclear Science, 52(5), 1555-1561. External link
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (2004). ESys.Net: a new solution for embedded systems modeling and simulation. ACM SIGPLAN Notices, 39(7), 107-114. External link
Chabini, N., Chabini, I., Aboulhamid, E. M., & Savaria, Y. (2003). Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 22(3), 346-351. External link
Cerny, E., Aboulhamid, E. M., Bois, G., & Cloutier, J. (1988). Built-in self-test of a CMOS ALU. IEEE Design & Test of Computers, 5(4), 38-48. External link
Fourmigue, A., Beltrame, G., Nicolescu, G., & Aboulhamid, E. M. (2011, October). A linear-time approach for the transient thermal simulation of liquid-cooled 3D ICs [Paper]. 9th IEEE/ACM International Conference on Hardware/Software-Codesign and System Synthesis (CODES+ISSS 2011), part of Embedded Systems Week (ESWEEK 2011), Taipei, Taiwan. External link
Fourmigue, A., Beltrame, G., Nicolescu, G., Aboulhamid, E. M., & O'Connor, I. (2011, March). Multi-granularity thermal evaluation of 3D MPSoC architectures [Paper]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. External link
Girodias, B., Gheorghe, L., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Langevin, M., & Paulin, P. (2010, June). Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip [Paper]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, VA, USA. External link
Azzabi, A., Aboulhamid, E. M., & Nicolescu, G. (2010, December). Timing verification of cyclic systems based on temporal constraint analysis [Paper]. 17th IEEE International Conference on Electronics, Circuits and Systems, Athens, Greece. External link
Ethier, S., Sawan, M., Aboulhamid, E. M., & El-Gamal, M. (2009, August). A 9 V fully integrated CMOS electrode driver for high-impedance microstimulation [Paper]. 52nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2009), Cancun, Mexico. External link
Fourmigue, A., Girodias, B., Nicolescu, G., & Aboulhamid, E. M. (2009, April). Co-simulation based platform for wireless protocols design explorations [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2009), Nice, France. External link
Tsikhanovich, A., Aboulhamid, E. M., & Bois, G. (2007, August). Timing specification in transaction level modeling of hardware/software systems [Paper]. 50th Midwest Symposium on Circuits and Systems (MWSCAS 2007), Montreal, QC, Canada. Published in Conference proceedings (Midwest Symposium on Circuits and Systems. External link
Tsikhanovich, A., Aboulhamid, E. M., & Bois, G. (2007, December). Communication Structure Refinement using Temporal Constraints Analysis [Paper]. 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2007), Marrakech, Morocco. External link
Brassard, O., Rousseau, F., David, J. P., Kastle, M., & Aboulhamid, E. M. (2006, June). Automatic generation of embedded systems with .NET framework based tools [Paper]. IEEE North-East Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Québec, Canada. External link
Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., & Coelho, F. (2006, September). Buffer and register allocation for memory space optimization [Paper]. 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2006), Steamboat Springs, CO, USA. External link
Girodias, B., Aboulhamid, E. M., & Nicolescu, G. (2006, January). A platform for refinement of OS services for embedded systems [Paper]. 3rd International Workshop on Electronic Design, Test and Applications (DELTA 2006), Kuala Lumpur, Malaysia (7 pages). External link
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., & Rousseau, F. (2006, December). Separating Modeling and Simulation Aspects in Hardware/Software System Design [Paper]. International Conference on Microelectronics, Dhahran, Saudi Arabia. External link
Tsikhanovich, A., Rousseau, F., Aboulhamid, E. M., & Bois, G. (2006, May). Transaction Level Modeling in Hardware/Software System Design using .Net Framework [Paper]. Canadian Conference on Electrical and Computer Engineering (CCECE 2006), Ottawa, ON, Canada. External link
Lapalme, J., Aboulhamid, E. M., & Nicolescu, G. (2005, June). Leveraging Model Representations for System Level Design Tools [Paper]. 16th International Workshop on Rapid System Prototyping (RSP 2005), Montréal, QC, Canada. External link
Tsikhanovich, A., Aboulhamid, E. M., & Bois, G. (2005, July). A methodology for HW/SW specification and simulation at multiple levels of abstraction [Paper]. 5th International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), Banff, AB, Canada. External link
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (2004, June). Esys.net: A New Solution for Embedded Systems Modeling and Simulation [Paper]. ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2004), Washington, D.C.. Published in ACM Sigplan Notices, 39(7). External link
Zerarka, M. T., David, J. P., & Aboulhamid, E. M. (2004, July). High speed emulation of gene regulatory networks using FPGAs [Paper]. 47th Midwest Symposium on Circuits and Systems (MWSCAS 2004), Hiroshima, Japan. External link
Gorse, N., Bélanger, P., Aboulhamid, E. M., & Savaria, Y. (2004, December). Mixing linguistic and formal techniques for high-level requirements engineering [Paper]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. External link
Charest, L., Aboulhamid, E. M., & Bois, G. (2004, July). Using design patterns for type unification and introspection in SystemC [Paper]. 4th International Workshop on System-on-Chip for Real-Time Applications, Banff, AB, Canada. External link
Regimbal, S., Lemire, J.-F., Savaria, Y., Bois, G., Aboulhamid, E. M., & Baron, A. (2003, June). Automating functional coverage analysis based on an executable specification [Paper]. 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, Calgary, Alberta, Canada. External link
Sun, L. P., Aboulhamid, E. M., & David, J. P. (2003, December). Network on chip using a reconfigurable platform [Paper]. 46th Midwest Symposium on Circuits and Systems (MWSCAS 2003), Cairo, Egypt. External link
Filion, L., Chevalier, J., Bois, G., & Aboulhamid, E. M. The Syslib-Picasso Methodology for the Co-Design Specification Capture Phase [Paper]. System-on-Chip for Real-Time Applications. External link
Chabini, N., Chabini, I., Aboulhamid, E. M., & Savaria, Y. (2003, April). Unification of basic retiming and supply voltage scaling to minimize dynamic power consumption for synchronous digital designs [Paper]. Great Lakes Symposium on VLSI (GLSVLSI 2003), Washington, D. C., USA. External link
Charest, L., Reid, M., Aboulhamid, E. M., & Bois, G. (2001, March). A methodology for interfacing open source SystemC with a third party software [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2001), Munich, Germany. External link
Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. (2002, August). Minimizing the number of registers and the number of phases in synchronous digital designs with minimal clock period [Paper]. 45th Midwest Symposium on Circuits and Systems (MWSCAS 2002), Tulsa, OK, USA. External link
Chabini, N., Aboulhamid, E. M., & Savaria, Y. (2001, August). Efficient Methods for Reducing Register and Phase Requirements for Synchronous Circuits Derived Using Software Pipelining Techniques [Paper]. European Conference on Circuit Theory and Design (ECCTD 2001), Espoo, Finland. Unavailable
Boyer, F.-R., Aboulhamid, E. M., & Savaria, Y. (2001, August). Minimizing sensitivity to clock skew variations using level sensitive latches [Paper]. 15th European Conference on Circuit Theory and Design (ECCTD 2001), Espoo, Finland. Unavailable
Fourmigue, A., Girodias, B., Gheorghe, L., Nicolescu, G., & Aboulhamid, E. M. (2012). Wireless design platform combining simulation and testbed environments. In Design technology for heterogeneous embedded systems (pp. 137-156). External link
Girodias, B., Bouchebaba, Y., Paulin, P., Lavigueur, B., Nicolescu, G., & Aboulhamid, E. M. (2010). Compiler Techniques for Application Level Memory Optimization for MPSoC. In Kornaros, G. (ed.), Multi-Core Embedded Systems (pp. 243-268). External link
Lapalme, J., Aboulhamid, E. M., & Nicolescu, G. (2010). The Semantic Web Applied to IP-Based Design. In Aboulhamid, E. M., & Rousseau, F. (eds.), System Level Design with .Net Technology (pp. 55-88). External link
Tsikhanovich, A., Aboulhamid, E. M., & Bois, G. (2009). Timing Specification in Transaction Level Models. In Aboulhamid, E. M., & Rousseau, F. (eds.), System Level Design with .Net Technology (pp. 203-238). External link
