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Documents dont l'auteur est "Aboulhamid, El Mostapha"

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Nombre de documents: 17

Fourmigue, A., Girodias, B., Gheorghe, L., Nicolescu, G., & Aboulhamid, E. M. (2012). Wireless design platform combining simulation and testbed environments. Dans Design technology for heterogeneous embedded systems (137-156). Lien externe

Fourmigue, A., Beltrame, G., Nicolescu, G., & Aboulhamid, E. M. (octobre 2011). A linear-time approach for the transient thermal simulation of liquid-cooled 3D ICs [Communication écrite]. 9th IEEE/ACM International Conference on Hardware/Software-Codesign and System Synthesis (CODES+ISSS 2011), part of Embedded Systems Week (ESWEEK 2011), Taipei, Taiwan. Lien externe

Fourmigue, A., Beltrame, G., Nicolescu, G., Aboulhamid, E. M., & O'Connor, I. (mars 2011). Multi-granularity thermal evaluation of 3D MPSoC architectures [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe

Azzabi, A., Aboulhamid, E. M., & Nicolescu, G. (décembre 2010). Timing verification of cyclic systems based on temporal constraint analysis [Communication écrite]. 17th IEEE International Conference on Electronics, Circuits and Systems, Athens, Greece. Lien externe

Ethier, S., Sawan, M., Aboulhamid, E. M., & El-Gamal, M. (août 2009). A 9 V fully integrated CMOS electrode driver for high-impedance microstimulation [Communication écrite]. 52nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2009), Cancun, Mexico. Lien externe

Fourmigue, A., Girodias, B., Nicolescu, G., & Aboulhamid, E. M. (avril 2009). Co-simulation based platform for wireless protocols design explorations [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2009), Nice, France. Lien externe

Tsikhanovich, A., Aboulhamid, E. M., & Bois, G. (2009). Timing Specification in Transaction Level Models. Dans Aboulhamid, E. M., & Rousseau, F. (édit.), System Level Design with .Net Technology (203-238). Lien externe

Bouchebaba, Y., Girodias, B., Nicolescu, G., Aboulhamid, E. M., Lavigueur, B., & Paulin, P. (2007). MPSoC memory optimization using program transformation. ACM Transactions on Design Automation of Electronic Systems, 12(4), 43-43. Lien externe

Brassard, O., Rousseau, F., David, J. P., Kastle, M., & Aboulhamid, E. M. (juin 2006). Automatic generation of embedded systems with .NET framework based tools [Communication écrite]. IEEE North-East Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Québec, Canada. Lien externe

Lapalme, J., Aboulhamid, E. M., & Nicolescu, G. (2006). A new efficient EDA tool design methodology. ACM Transactions on Embedded Computing Systems, 5(2), 408-430. Lien externe

Chevalier, J. M., De Nanclas, M., Filion, L., Benny, O., Rondonneau, M., Bois, G., & Aboulhamid, E. M. (2006). A Systemc Refinement Methodology for Embedded Software. IEEE Design & Test of Computers, 23(2), 148-158. Lien externe

Zerarka, M. T., David, J. P., & Aboulhamid, E. M. (juillet 2004). High speed emulation of gene regulatory networks using FPGAs [Communication écrite]. 47th Midwest Symposium on Circuits and Systems (MWSCAS 2004), Hiroshima, Japan. Lien externe

Gorse, N., Bélanger, P., Aboulhamid, E. M., & Savaria, Y. (décembre 2004). Mixing linguistic and formal techniques for high-level requirements engineering [Communication écrite]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. Lien externe

Chabini, N., Chabini, I., Aboulhamid, E. M., & Savaria, Y. (2003). Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 22(3), 346-351. Lien externe

Sun, L. P., Aboulhamid, E. M., & David, J. P. (décembre 2003). Network on chip using a reconfigurable platform [Communication écrite]. 46th Midwest Symposium on Circuits and Systems (MWSCAS 2003), Cairo, Egypt. Lien externe

Filion, L., Chevalier, J., Bois, G., & Aboulhamid, E. M. The Syslib-Picasso Methodology for the Co-Design Specification Capture Phase [Communication écrite]. System-on-Chip for Real-Time Applications. Lien externe

Boyer, F.-R., Aboulhamid, E. M., & Savaria, Y. (août 2001). Minimizing sensitivity to clock skew variations using level sensitive latches [Communication écrite]. 15th European Conference on Circuit Theory and Design (ECCTD 2001), Espoo, Finland. Non disponible

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