A 150-Mbps Low-Latency Small-Size Fault Digital Isolation System in 180-nm CMOS Process for Aerospace Applications

Isa Altoobaji, Ahmad Hassan, Mohamed Ali, Yves Audet and Ahmed Lakhssassi

Article (2026)

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Department:	Department of Electrical Engineering
Funders:	Mitacs, Natural Sciences and Engineering Research Council of Canada (NSERC)
PolyPublie URL:	https://publications.polymtl.ca/77290/
Journal Title:	IEEE Transactions on Aerospace and Electronic Systems (vol. 62)
Publisher:	Institute of Electrical and Electronics Engineers
DOI:	10.1109/taes.2026.3689527
Official URL:	https://doi.org/10.1109/taes.2026.3689527
Date Deposited:	09 Jun 2026 15:23
Last Modified:	09 Jun 2026 15:23

Cite in APA 7:	Altoobaji, I., Hassan, A., Ali, M., Audet, Y., & Lakhssassi, A. (2026). A 150-Mbps Low-Latency Small-Size Fault Digital Isolation System in 180-nm CMOS Process for Aerospace Applications. IEEE Transactions on Aerospace and Electronic Systems, 62, 10305-10313. https://doi.org/10.1109/taes.2026.3689527
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