Imad Benacer, François-Raymond Boyer
, Normand Bélanger and Yvon Savaria
Paper (2016)
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| Department: |
Department of Computer Engineering and Software Engineering Department of Electrical Engineering |
|---|---|
| Research Center: | GR2M - Microelectronics and Microsystems Research Group |
| PolyPublie URL: | https://publications.polymtl.ca/36255/ |
| Conference Title: | 14th IEEE International New Circuits and Systems Conference (NEWCAS 2016) |
| Conference Location: | Vancouver, Canada |
| Conference Date(s): | 2016-06-26 - 2016-06-29 |
| Publisher: | IEEE |
| DOI: | 10.1109/newcas.2016.7604761 |
| Official URL: | https://doi.org/10.1109/newcas.2016.7604761 |
| Date Deposited: | 18 Apr 2023 15:05 |
| Last Modified: | 25 Sep 2024 16:20 |
| Cite in APA 7: | Benacer, I., Boyer, F.-R., Bélanger, N., & Savaria, Y. (2016, June). A fast systolic priority queue architecture for a flow-based Traffic Manager [Paper]. 14th IEEE International New Circuits and Systems Conference (NEWCAS 2016), Vancouver, Canada (4 pages). https://doi.org/10.1109/newcas.2016.7604761 |
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