Documents publiés en "2002"

B

Ben Hamida, N., Kamińska, B., & Savaria, Y. (mai 1993). Initiability: A Measure of Sequential Testability [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 1993), Chicago, IL, USA. Lien externe

Bendali, A., & Savaria, Y. (mai 2002). Low-voltage bandgap reference with temperature compensation based on a threshold voltage technique [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Phoenix-Scottsdale, AZ. Lien externe

Bougataya, M., Lakhsasi, A., Savaria, Y., & Massicotte, D. (mai 2002). Mixed fluid-heat transfer approach for VLSI steady state thermal analysis [Communication écrite]. Canadian Conference on Electrical and Computer Engineering (CCECE 2002), Winnipeg, MB, Canada. Lien externe

C

Calbaza, D. E., & Savaria, Y. (2002). A Direct Digital Period Synthesis Circuit. IEEE Journal of Solid-State Circuits, 37(8), 1039-1045. Lien externe

Cantin, M.-A., Savaria, Y., & Lavoie, P. (mai 2002). A comparison of automatic word length optimization procedures [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Phoenix-Scottsdale, AZ. Lien externe

Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. Minimizing the Number of Phases in Clocked Digital Designs Derived Using Modulo Scheduling Techniques [Communication écrite]. Icm 2002: 14th International Conference on Microelectronics. Lien externe

Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. (août 2002). Minimizing the number of registers and the number of phases in synchronous digital designs with minimal clock period [Communication écrite]. 45th Midwest Symposium on Circuits and Systems (MWSCAS 2002), Tulsa, OK, USA. Lien externe

D

Dido, J., Geraudie, N., Loiseau, L., Payeur, O., Savaria, Y., & Poirier, D. (février 2002). A flexible floating-point format for optimizing data-paths and operators in FPGA based DSPs [Communication écrite]. 10th ACM International Symposium on Field-Programmable Gate Arrays (FPGA 2002). Lien externe

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Fouzar, Y., Savaria, Y., & Sawan, M. (mai 2002). A CMOS phase-locked loop with an auto-calibrated VCO [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Phoenix-Scottsdale, AZ. Lien externe

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Granger, É., Savaria, Y., & Lavoie, P. (2002). A pattern reordering approach based on ambiguity detection for on-line category learning. (Rapport technique n° EPM-RT-2001-02). Disponible

H

Hashemi, S., Sawan, M., & Savaria, Y. (janvier 2002). Analysis of power chains in transcutaneously powered electronic implants [Communication écrite]. 7th Annual Conference of the International Functional Electrical Stimulation Society (IFESS 2002), Lubljana. Non disponible

J

Jin, Z.-F., Laurin, J.-J., & Savaria, Y. (2002). A practical approach to model long MIS interconnects in VLSI circuits. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10(4), 494-507. Lien externe

K

Khali, H., Houle, J.-L., & Savaria, Y. (mai 1993). A high speed parallel structure for the basic wavelet transform algorithm [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 1993), Chicago, IL, USA. Lien externe

L

Lafrance, L.-P., Cantin, M.-A., Savaria, Y., Sung, S. H., & Lavoie, P. (mai 2002). Architecture and performance characterization of hardware and software implementations of the Crozier frequency estimation algorithm [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Phoenix-Scottsdale, AZ. Lien externe

Loiseau, L., & Savaria, Y. (2002). Methodologies and Strategies for Effective Design Reuse. Canadian Journal of Electrical and Computer Engineering, 27(4), 165-169. Non disponible

M

Meunier, M., Gagnon, Y., Savaria, Y., & Lacourse, A. (mai 2002). Laser tuning silicon microdevices for analogue microelectronics [Communication écrite]. SPIE Regional Meeting on Optoelectronics, Photonics, and Imaging (Opto Canada 2002), Ottawa, ON, Canada. Lien externe

Meunier, M., Gagnon, Y., Savaria, Y., Lacourse, A., & Cadotte, M. (juin 2001). A novel laser trimming technique for microelectronics [Communication écrite]. European Materials Research Society 2001-Symposium L "Photon-Induced Surface Processing", Strasbourg, France. Publié dans Applied Surface Science, 186(1-4). Lien externe

N

Nekili, M., & Savaria, Y. (mai 1993). Parallel regeneration of interconnections in VLSI & ULSI circuits [Communication écrite]. IEEE International Symposium on Circuits and Systems, Chicago, IL, USA. Publié dans 1993 IEEE International Symposium on Circuits and Systems, 24. Lien externe

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Qiu, B., Savaria, Y., Lu, M., Wang, C., & Thibeault, C. (novembre 2002). Yield modeling of a WSI telecom router architecture [Communication écrite]. IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2002), Vancouver, BC, Canada. Lien externe

R

Renaud, M., & Savaria, Y. (mai 2002). A linear phase detector for arbitrary clock signals [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Phoenix-Scottsdale, AZ. Lien externe