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Laflamme-Mayer, N. (2018). Conception d'un réseau de plots configurables multifonctions analogiques et numériques combiné à un réseau de distribution de puissance intégrés à l'échelle de la tranche de silicium [Ph.D. thesis, École Polytechnique de Montréal]. Available
Laflamme-Mayer, N., Kowarzyk, G., Blaquiere, Y., Savaria, Y., & Sawan, M. (2018). A Defect-Tolerant Reusable Network of DACs for Wafer-Scale Integration. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27(2), 304-315. External link
Laflamme-Mayer, N., Blaquière, Y., & Sawan, M. (2015). A configurable analog buffer dedicated to a wafer-scale prototyping platform. Analog Integrated Circuits and Signal Processing, 82(1), 57-66. External link
Laflamme-Mayer, N., Blaquière, Y., Savaria, Y., & Sawan, M. (2014). A configurable multi-rail power and I/O pad applied to wafer-scale systems. IEEE Transactions on Circuits and Systems I: Regular Papers, 61(11), 3135-3144. External link
Laflamme-Mayer, N., Sawan, M., & Blaquière, Y. (2013, February). A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems [Paper]. 4th IEEE Latin American Symposium on Circuits and Systems (LASCAS 2013), Cusco, Peru. External link
Laflamme-Mayer, N., André, W., Valorge, O., Blaquière, Y., & Sawan, M. (2013). Configurable input-output power pad for wafer-scale microelectronic systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 21(11), 2024-2033. External link
Laflamme-Mayer, N. (2011). Conception d'un plot reconfigurable pour un réseau de distribution de puissance à l'échelle de la tranche en technologie CMOS [Master's thesis, École Polytechnique de Montréal]. Available
Laflamme-Mayer, N., Sawan, M., & Blaquière, Y. (2011, June). A dual-power rail, low-dropout, fast-response linear regulator dedicated to a wafer-scale electronic systems prototyping platform [Paper]. 9th IEEE International New Circuits and Systems Conference (NEWCAS 2011), Bordeaux, France. External link
Laflamme-Mayer, N., Blaquière, Y., & Sawan, M. (2011, December). A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systems [Paper]. 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2011), Beirut, Lebanon. External link
Laflamme-Mayer, N., Valorge, O., Blaquière, Y., & Sawan, M. (2010, June). A Low-Power, Small-Area Voltage Reference Array for a Wafer-Scale Prototyping Platform [Paper]. 8th IEEE International NEWCAS Conference (NEWCAS 2010), Montréal, Québec. External link
Lepercq, É., Valorege, O., Basile-Bellavance, Y., Laflamme-Mayer, N., Blaquière, Y., & Savaria, Y. (2009, October). An interconnection network for a novel reconfigurable circuit board [Paper]. 2nd Microsystems and Nanoelectronics Research Conference, Ottawa, Canada. External link
