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Ciccarelli, L., & Lodi, A. (2010). T-switch buffer, in particular for FPGA architectures. (Patent no. US7683674). External link
Ciccarelli, L., Chiesa, C., Lodi, A., Giansante, R., Toma, M., & Campi, F. (2008). Switch block and corresponding switch matrix, in particular for FPGA architectures. (Patent no. US7463055). External link
Cappelli, A., Ciccarelli, L., Lodi, A., Toma, M., & Campi, F. (2007). Architecture for a connection block in reconfigurable gate arrays. (Patent no. US7193437). External link
Campi, F., Deledda, A., Pizzotti, M., Ciccarelli, L., Rolandi, P., Mucci, C., Lodi, A., Vitkovski, A., & Vanzolini, L. (2007, April). A dynamically adaptive DSP for heterogeneous reconfigurable platforms [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2007), Nice Acropolis, France. External link
Ciccarelli, L., Loparco, D., Innocenti, M., Lodi, A., Mucci, C., & Rolandi, P. (2006, September). A low-power routing architecture optimized for deep sub-micron FPGAs [Paper]. IEEE Custom Integrated Circuits Conference (CICC 2006), San Jose, CA, United states. External link
Cappelli, A., Lodi, A., Bocchi, M., Mucci, C., Innocenti, M., De, B. C., Ciccarelli, L., Giansante, R., Deledda, A., Campi, F., Toma, M., & Guerrieri, R. (2005, February). XiSystem: A XiRisc-based SoC with a reconfigurable IO module [Paper]. IEEE International Solid-State Circuits Conference (ISSCC 2005), San Francisco, CA, United states. External link
Ciccarelli, L., Lodi, A., & Canegallo, R. (2004, October). Low leakage circuit design for FPGAs [Paper]. IEEE Custom Integrated Circuits Conference (CICC 2004), Orlando, FL, United states. External link
Lodi, A., Mucci, C., Bocchi, M., Cappelli, A., De Dominicis, M., & Ciccarelli, L. (2006, August). A multi-context pipelined array for embedded systems [Paper]. International Conference on Field Programmable Logic and Applications (FPL 2006), Madrid, Spain. External link
Lodi, A., Ciccarelli, L., & Giansante, R. (2005, February). Combining low-leakage techniques for FPGA routing design [Paper]. 13th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2005), Monterey, CA, United states. External link
Lodi, A., Ciccarelli, L., Mucci, C., Giansante, R., Cappelli, A., & Toma, M. (2005, April). An embedded reconfigurable datapath for SoC [Paper]. 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), Napa, CA, United states. External link
Lodi, A., Ciccarelli, L., Loparco, D., Canegallo, R., & Guerrieri, R. (2005, September). Low leakage design of LUT-based FPGAs [Paper]. 31st European Solid-State Circuits Conference (ESSCIRC 2005), Grenoble, France. External link
Lodi, A., Giansante, R., Chiesa, C., Ciccarelli, L., Toma, M., & Campi, F. (2004, February). Routing architecture for multi-context FPGAs [Paper]. 12th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2004), Monterey, CA, USA. External link
Lodi, A., Ciccarelli, L., Cappelli, A., Campi, F., & Toma, M. (2003, February). Decoder-based multi-context interconnect architecture [Paper]. IEEE Computer Society Annual Symposium on VLSI: New Trends and Technologies for Vlsi Systems Design (ISVLSI 2003), Tampa, FL, United states. External link
Mucci, C., Bocchi, M., Gagliardi, P., Ciccarelli, L., Lodi, A., Toma, M., & Campi, F. (2006, May). A case-study on multimedia applications for the XiRisc reconfigurable processor [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Kos, Greece. External link
