Luca Ciccarelli, Andrea Lodi and Roberta Canegallo
Paper (2004)
Document published while its authors were not affiliated with Polytechnique Montréal
An external link is available for this itemAdditional Information: | Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC, October 3, 2004 - October 6, 2004 |
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PolyPublie URL: | https://publications.polymtl.ca/25147/ |
Conference Title: | IEEE Custom Integrated Circuits Conference (CICC 2004) |
Conference Location: | Orlando, FL, United states |
Conference Date(s): | 2004-10-03 - 2004-10-06 |
Publisher: | Institute of Electrical and Electronics Engineers |
DOI: | 10.1109/cicc.2004.1358929 |
Official URL: | https://doi.org/10.1109/cicc.2004.1358929 |
Date Deposited: | 18 Apr 2023 15:19 |
Last Modified: | 18 Apr 2023 15:19 |
Cite in APA 7: | Ciccarelli, L., Lodi, A., & Canegallo, R. (2004, October). Low leakage circuit design for FPGAs [Paper]. IEEE Custom Integrated Circuits Conference (CICC 2004), Orlando, FL, United states. https://doi.org/10.1109/cicc.2004.1358929 |
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