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Items where Author is "Blaquiere, Y."

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Number of items: 11.

B

Berrima, S., Blaquiere, Y., & Savaria, Y. (2017, August). Sub-ps resolution programmable delays implemented in a Xilinx FPGA [Paper]. 60th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2017), Boston, MA. External link

Berriah, O., Bougataya, M., Lakhssassi, A., Blaquiere, Y., & Savaria, Y. (2010, June). Thermal analysis of a miniature electronic power device matched to a silicon wafer [Paper]. 8th IEEE International NEWCAS Conference (NEWCAS 2010), Montréal, Québec. External link

Basile-Bellavance, Y., Blaquiere, Y., & Savaria, Y. (2009, June). Faults diagnosis methodology for the WaferNet interconnection network [Paper]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2009), Toulouse, France. External link

Basile-Bellavance, Y., Lepercq, E., Blaquiere, Y., & Savaria, Y. (2008, August). Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL [Paper]. 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2008). External link

Blaquiere, Y., Dagenais, M., & Savaria, Y. (1996). Timing analysis speed-up using a hierarchical and a multimode approach. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 15(2), 244-255. External link

L

Laflamme-Mayer, N., Valorge, O., Blaquiere, Y., & Sawan, M. (2010, June). A Low-Power, Small-Area Voltage Reference Array for a Wafer-Scale Prototyping Platform [Paper]. 8th IEEE International NEWCAS Conference (NEWCAS 2010), Montréal, Québec. External link

Lepercq, E., Blaquiere, Y., Norman, R., & Savaria, Y. (2009, May). Workflow for an electronic configurable prototyping system [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2009), Taipei, Taiwan. External link

N

Nguyen, H. H., Guillemot, M., Savaria, Y., & Blaquiere, Y. (2012, October). A new approach for pin detection for an electronic system prototyping reconfigurable platform [Paper]. 23rd IEEE International Symposium on Rapid System Prototyping (RSP 2012), Tampere, Finland. External link

Norman, R., Lepercq, E., Blaquiere, Y., Valorge, O., Basile-Bellavance, Y., Prytula, R., & Savaria, Y. (2008, June). An interconnection network for a novel reconfigurable circuit board [Paper]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2008). External link

S

Sion, G., Blaquiere, Y., & Savaria, Y. (2015, July). Defect diagnosis algorithms for a field programmable interconnect network embedded in a very large area integrated circuit [Paper]. 21st International On-Line Testing Symposium (IOLTS 2015), Athena Pallas, Greece. External link

T

Thibeault, C., Pichette, S., Audet, Y., Savaria, Y., Rufenacht, H., Gloutnay, E., Blaquiere, Y., Moupfouma, F., & Batani, N. (2012). On Extra Combinational Delays in SRAM FPGAs Due to Transient Ionizing Radiations. IEEE Transactions on Nuclear Science, 59(6), 2959-65. External link

List generated on: Sun Mar 3 08:01:02 2024 EST