HLSCAM: Fine-Tuned HLS-Based Content Addressable Memory Implementation for Packet Processing on FPGA

Mostafa Abbasmollaei, Tarek Ould-Bachir and Yvon Savaria

Article (2025)

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Department:	Department of Electrical Engineering Department of Computer Engineering and Software Engineering
PolyPublie URL:	https://publications.polymtl.ca/64764/
Journal Title:	Electronics (vol. 14, no. 9)
Publisher:	Multidisciplinary Digital Publishing Institute
DOI:	10.3390/electronics14091765
Official URL:	https://doi.org/10.3390/electronics14091765
Date Deposited:	30 Apr 2025 11:57
Last Modified:	30 Apr 2025 11:57

Cite in APA 7:	Abbasmollaei, M., Ould-Bachir, T., & Savaria, Y. (2025). HLSCAM: Fine-Tuned HLS-Based Content Addressable Memory Implementation for Packet Processing on FPGA. Electronics, 14(9), 1765 (22 pages). https://doi.org/10.3390/electronics14091765
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