Carlo Condo, Pascal Giard, François Leduc-Primeau
, Gabi Sarkis and Warren J. Gross
Article (2018)
Document published while its authors were not affiliated with Polytechnique Montréal
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| Research Center: | GR2M - Microelectronics and Microsystems Research Group |
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| PolyPublie URL: | https://publications.polymtl.ca/41618/ |
| Journal Title: | IEEE Transactions on Circuits and Systems I: Regular Papers (vol. 65, no. 4) |
| Publisher: | IEEE |
| DOI: | 10.1109/tcsi.2017.2745902 |
| Official URL: | https://doi.org/10.1109/tcsi.2017.2745902 |
| Date Deposited: | 18 Apr 2023 15:03 |
| Last Modified: | 25 Sep 2024 16:27 |
| Cite in APA 7: | Condo, C., Giard, P., Leduc-Primeau, F., Sarkis, G., & Gross, W. J. (2018). A 9.52 dB NCG FEC Scheme and 162 b/Cycle Low-Complexity Product Decoder Architecture. IEEE Transactions on Circuits and Systems I: Regular Papers, 65(4), 1420-1431. https://doi.org/10.1109/tcsi.2017.2745902 |
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