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Condo, C., Giard, P., Leduc-Primeau, F., Sarkis, G., & Gross, W. J. (2018). A 9.52 dB NCG FEC Scheme and 162 b/Cycle Low-Complexity Product Decoder Architecture. IEEE Transactions on Circuits and Systems I: Regular Papers, 65(4), 1420-1431. Lien externe
Condo, C., Leduc-Primeau, F., Sarkis, G., Giard, P., & Gross, W. J. (décembre 2016). Stall pattern avoidance in polynomial product codes [Communication écrite]. IEEE Global Conference on Signal and Information Processing (GlobalSIP 2016), Washington, D.C.. Lien externe
Joliveau, M., Giard, P., Gendreau, M., Gagnon, F., & Thibeault, C. (juin 2011). Design of low complexity multiplierless digital filters with optimized free structure using a population-based metaheuristic [Communication écrite]. International Symposium on Signals, Circuits and Systems, ISSCS 2011, Iasi, Romania. Lien externe
Leduc-Primeau, F., Raymond, A. J., Giard, P., Cushon, K., Thibeault, C., & Gross, W. J. (octobre 2012). High-throughput LDPC decoding using the RHS algorithm [Communication écrite]. Conference on Design and Architectures for Signal and Image Processing, Karlsruhe, Germany (6 pages). Lien externe
