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A practical design method for prototyping self-timed processors using FPGAs

Mickaël Fiorentino, Yvon Savaria, Claude Thibeault and Pascal Gervais

Paper (2016)

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Department: Department of Electrical Engineering
ISBN: 9781479953417
PolyPublie URL: https://publications.polymtl.ca/35894/
Conference Title: IEEE International Symposium on Circuits and Systems (ISCAS 2016)
Conference Location: Montréal, Québec
Conference Date(s): 2016-05-22 - 2016-05-25
Publisher: IEEE
DOI: 10.1109/iscas.2016.7538907
Official URL: https://doi.org/10.1109/iscas.2016.7538907
Date Deposited: 18 Apr 2023 15:05
Last Modified: 08 Apr 2025 12:21
Cite in APA 7: Fiorentino, M., Savaria, Y., Thibeault, C., & Gervais, P. (2016, May). A practical design method for prototyping self-timed processors using FPGAs [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2016), Montréal, Québec. https://doi.org/10.1109/iscas.2016.7538907

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