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Retiming for the global optimization of synchronous sequential circuits

Samir Lejmi, Bozena Kaminska and Edouard Wagneur

Paper (1994)

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Additional Information: Nom historique du département: Département de génie électrique et de génie informatique
Department: Department of Electrical Engineering
Department of Computer Engineering and Software Engineering
PolyPublie URL: https://publications.polymtl.ca/33082/
Conference Title: IEEE International Conference on Computer Design: VLSI in Computers and Processors
Conference Location: Cambridge, MA, USA
Conference Date(s): 1994-10-10 - 1994-10-12
Publisher: IEEE
Date Deposited: 18 Apr 2023 15:25
Last Modified: 05 Apr 2024 11:24
Cite in APA 7: Lejmi, S., Kaminska, B., & Wagneur, E. (1994, October). Retiming for the global optimization of synchronous sequential circuits [Paper]. IEEE International Conference on Computer Design: VLSI in Computers and Processors, Cambridge, MA, USA.

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