Samir Lejmi, Bozena Kaminska and Edouard Wagneur
Paper (1994)
An external link is available for this item| Additional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/33082/ |
| Conference Title: | IEEE International Conference on Computer Design: VLSI in Computers and Processors |
| Conference Location: | Cambridge, MA, USA |
| Conference Date(s): | 1994-10-10 - 1994-10-12 |
| Publisher: | IEEE |
| DOI: | 10.1109/iccd.1994.331935 |
| Official URL: | https://doi.org/10.1109/iccd.1994.331935 |
| Date Deposited: | 18 Apr 2023 15:25 |
| Last Modified: | 25 Nov 2025 12:00 |
| Cite in APA 7: | Lejmi, S., Kaminska, B., & Wagneur, E. (1994, October). Retiming for the global optimization of synchronous sequential circuits [Paper]. IEEE International Conference on Computer Design: VLSI in Computers and Processors, Cambridge, MA, USA. https://doi.org/10.1109/iccd.1994.331935 |
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