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Collaboration networkThis graph maps the connections between all the collaborators of {}'s publications listed on this page.
Each link represents a collaboration on the same publication. The thickness of the link represents the number of collaborations.
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Word cloudA word cloud is a visual representation of the most frequently used words in a text or a set of texts. The words appear in different sizes, with the size of each word being proportional to its frequency of occurrence in the text. The more frequently a word is used, the larger it appears in the word cloud. This technique allows for a quick visualization of the most important themes and concepts in a text.
In the context of this page, the word cloud was generated from the publications of the author {}. The words in this cloud come from the titles, abstracts, and keywords of the author's articles and research papers. By analyzing this word cloud, you can get an overview of the most recurring and significant topics and research areas in the author's work.
The word cloud is a useful tool for identifying trends and main themes in a corpus of texts, thus facilitating the understanding and analysis of content in a visual and intuitive way.
Lejmi, S., Kaminska, B., & Ayari, B. (1995, April). Retiming for BIST-sequential circuits [Paper]. 1995 IEEE International Symposium on Circuits and Systems-ISCAS 95, Seattle, WA, USA. External link
Lejmi, S., Kaminska, B., & Ayari, B. (1995, April). Retiming, resynthesis, and partitioning for the pseudo-exhaustive testing of sequential circuits [Paper]. 13th IEEE VLSI Test Symposium, Princeton, NJ, USA. External link
Lejmi, S. (1995). Synthèse de la testiabilité des circuits séquentiels par la méthode de resynchronisation [Ph.D. thesis, École Polytechnique de Montréal]. Unavailable
Lejmi, S., Kaminska, B., & Ayari, B. (1995, October). Synthesis and retiming for the pseudo-exhaustive BIST of synchronous sequential circuits [Paper]. 1995 26th International Test Conference, Washington, DC, USA. External link
Lejmi, S., Kaminska, B., & Wagneur, E. (1994, October). Retiming for the global optimization of synchronous sequential circuits [Paper]. IEEE International Conference on Computer Design: VLSI in Computers and Processors, Cambridge, MA, USA. Unavailable
