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Equivalence proofs of some yield modeling methods for defect-tolerant integrated-circuits

C. Thibeault, Yvon Savaria and Jean-Louis Houle

Article (1995)

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Additional Information: Nom historique du département: Département de génie électrique et de génie informatique
Department: Department of Electrical Engineering
Department of Computer Engineering and Software Engineering
PolyPublie URL: https://publications.polymtl.ca/31691/
Journal Title: IEEE Transactions on Computers (vol. 44, no. 5)
Publisher: IEEE
DOI: 10.1109/12.381962
Official URL: https://doi.org/10.1109/12.381962
Date Deposited: 18 Apr 2023 15:25
Last Modified: 08 Apr 2025 06:52
Cite in APA 7: Thibeault, C., Savaria, Y., & Houle, J.-L. (1995). Equivalence proofs of some yield modeling methods for defect-tolerant integrated-circuits. IEEE Transactions on Computers, 44(5), 724-728. https://doi.org/10.1109/12.381962

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