Mohamed Nekili, Guy Bois and Yvon Savaria
Article (1997)
An external link is available for this itemAdditional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
PolyPublie URL: | https://publications.polymtl.ca/30196/ |
Journal Title: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems (vol. 5, no. 2) |
Publisher: | IEEE |
DOI: | 10.1109/92.585214 |
Official URL: | https://doi.org/10.1109/92.585214 |
Date Deposited: | 18 Apr 2023 15:23 |
Last Modified: | 25 Sep 2024 16:11 |
Cite in APA 7: | Nekili, M., Bois, G., & Savaria, Y. (1997). Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 5(2), 161-174. https://doi.org/10.1109/92.585214 |
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