A. Abderrahman, E. Cerny and Bozena Kaminska
Article (1999)
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| Additional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/29202/ |
| Journal Title: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (vol. 18, no. 3) |
| Publisher: | IEEE |
| DOI: | 10.1109/43.748163 |
| Official URL: | https://doi.org/10.1109/43.748163 |
| Date Deposited: | 18 Apr 2023 15:22 |
| Last Modified: | 08 Apr 2025 02:19 |
| Cite in APA 7: | Abderrahman, A., Cerny, E., & Kaminska, B. (1999). Worst Case Tolerance Analysis and Clp-Based Multifrequency Test Generation for Analog Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(3), 332-345. https://doi.org/10.1109/43.748163 |
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