M. 'hammed Sahnoun, Philippe Vialletelle, Samuel Bassetto, Michel Tollenaere and Soidri Bastoini
Paper (2010)
Document published while its authors were not affiliated with Polytechnique Montréal
This item is not archived in PolyPubliePolyPublie URL: | https://publications.polymtl.ca/17656/ |
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Conference Title: | Manufacturing Challenges in European Semiconductor Fabs |
Conference Location: | Rousset, France |
Conference Date(s): | 2010-11-20 |
Date Deposited: | 18 Apr 2023 15:14 |
Last Modified: | 25 Sep 2024 15:55 |
Cite in APA 7: | Sahnoun, M. , Vialletelle, P., Bassetto, S., Tollenaere, M., & Bastoini, S. (2010, November). Historical wafer-at-risk construction in STMicroelectronics 300mm wafer fab in crollesoptimizing return on inspection through defectivity smart skipping [Paper]. Manufacturing Challenges in European Semiconductor Fabs, Rousset, France. |
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