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Collaboration networkThis graph maps the connections between all the collaborators of {}'s publications listed on this page.
Each link represents a collaboration on the same publication. The thickness of the link represents the number of collaborations.
Use the mouse wheel or scroll gestures to zoom into the graph.
You can click on the nodes and links to highlight them and move the nodes by dragging them.
Hold down the "Ctrl" key or the "⌘" key while clicking on the nodes to open the list of this person's publications.
Word cloudA word cloud is a visual representation of the most frequently used words in a text or a set of texts. The words appear in different sizes, with the size of each word being proportional to its frequency of occurrence in the text. The more frequently a word is used, the larger it appears in the word cloud. This technique allows for a quick visualization of the most important themes and concepts in a text.
In the context of this page, the word cloud was generated from the publications of the author {}. The words in this cloud come from the titles, abstracts, and keywords of the author's articles and research papers. By analyzing this word cloud, you can get an overview of the most recurring and significant topics and research areas in the author's work.
The word cloud is a useful tool for identifying trends and main themes in a corpus of texts, thus facilitating the understanding and analysis of content in a visual and intuitive way.
Rayapati, V. N., & Kaminska, B. (1996). Interconnect propagation delay modeling and validation for the 16-MB CMOS SRAM chip. IEEE Transactions on Components, Packaging, and Manufacturing Technology. Part B, Advanced Packaging, 19(3), 605-614. External link
Rayapati, V. N., & Kaminska, B. (1994). A dynamic reconfiguration scheme for mega bit static random access memories. Microelectronics and reliability, 34(1), 107-114. External link
Rayapati, V. N., & Kaminska, B. (1994, August). Mega bit BiCMOS SRAM chip package modelling and performance analysis [Paper]. IEEE International Workshop on Memory Technology, Design, and Testing, San Jose, Cal, USA. External link
Rayapati, V. N., & Kaminska, B. (1994, August). Mega bit CMOS SRAM chip failure analysis using external electrical testing and internal contactless laser beam testing [Paper]. IEEE International Workshop on Memory Technology, Design, and Testing, San Jose, Cal, USA. External link
Rayapati, V. N., & Kaminska, B. (1993, August). Dynamic reconfiguration schemes for mega bit BiCMOS SRAMs [Paper]. IEEE International Workshop on Memory Testing (MT 1993), San Jose, CA, United states. External link
