Documents dont l'auteur est "O'Connor, Ian"

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Briere, M., Girodias, B., Bouchebaba, Y., Nicolescu, G., Mieyeville, F., Gafflot, F., & O'Connor, I. (août 2007). Architectural exploration of optical and electrical interconnects in MPSoC [Communication écrite]. IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007), Montreal, QC, Canada (4 pages). Lien externe

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Fourmigue, A., Beltrame, G., Nicolescu, G., Aboulhamid, E. M., & O'Connor, I. (mars 2011). Multi-granularity thermal evaluation of 3D MPSoC architectures [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe

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Hui, L., Le Beux, S., Nicolescu, G., & O'Connor, I. (janvier 2015). Energy-efficient optical crossbars on chip with multi-layer deposited silicon [Communication écrite]. 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), Chiba, Japan. Lien externe

Hui, L., Fourmigue, A., Le Beux, S., Letartre, X., O'Connor, I., & Nicolescu, G. (mars 2015). Thermal aware design method for VCSEL-based on-chip optical interconnect [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2015), Grenoble, France. Lien externe

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Iugan, L. G., Nicolescu, G., & O'Connor, I. (2016). Formalization for formal verification of an optical network-on-chip using DEVS. Dans Discrete-Event Modeling and Simulation: Theory and Applications (293-306). Lien externe

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Li, H., Fourmigue, A., Le Beux, S., O'Connor, I., & Nicolescu, G. (mars 2016). A thermal-Aware Laser Tuning Approach for Silicon Photonic Interconnects [Communication écrite]. 2nd International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS Workshop 2016), Dresden, Germany. Non disponible

Li, H., Fourmigue, A., Le Beux, S., O'Connor, I., & Nicolescu, G. (2016). Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser Tuning. IEEE Transactions on Emerging Topics in Computing, 6(3), 343-356. Lien externe

Le Beux, S., Li, H., O'Connor, I., Cheshmi, K., Liu, X., Trajkovic, J., & Nicolescu, G. (mars 2014). Chameleon: Channel efficient optical network-on-chip [Communication écrite]. 17th Design, Automation and Test in Europe (DATE 2014), Dresden, Germany. Lien externe

Le Beux, S., Li, H., Nicolescu, G., Trajkovic, J., & O'Connor, I. (2014). Optical crossbars on chip, a comparative study based on worst-case losses. Concurrency Computation Practice and Experience, 26(15), 2492-2503. Lien externe

Le Beux, S., Li, H., Nicolescu, G., & O'Connor, I. (mai 2014). A reconfigurable optical network on chip for streaming applications [Communication écrite]. 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC 2014), Montpellier, France (2 pages). Lien externe

Le Beux, S., O'Connor, I., Li, Z., Letartre, X., Monat, C., Trajkovic, J., & Nicolescu, G. (mai 2013). Potential and pitfalls of silicon photonics computing and interconnect [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2013), Beijing, China. Lien externe

Le Beux, S., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (2013). Reduction methods for adapting optical network on chip topologies to 3D architectures. Microprocessors and Microsystems, 37(1), 87-98. Lien externe

Le Beux, S., Trajkovic, J., O'Connor, I., & Nicolescu, G. (octobre 2011). Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC) [Communication écrite]. 19th IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC 2011), Kowloon, Hong kong. Lien externe

Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (mars 2011). Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe

Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (2010). Multi-optical network-on-chip for large scale MPSoC. IEEE Embedded Systems Letters, 2(3), 77-80. Lien externe

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Nicolescu, G., O'Connor, I., & Piguet, C. (2012). Design technology for heterogeneous embedded systems. Lien externe

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O'Connor, I., Liu, J., Kotb, J., Yakymets, N., Daviot, R., Navarro, D., Gaillardon, P.-E., Clermidy, F., Amadou, M., & Nicolescu, G. (octobre 2009). Emerging Technologies and Nanoscale Computing Fabrics [Communication écrite]. 17th IFIP WH 10.5/IEEE International Conference on Very Large Scale Integration (BLSI-SoC 2009), Florianopolis, Brazil (20 pages). Lien externe