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Lu, M., Savaria, Y., Qiu, B., & Taillefer, J. (novembre 2003). IEEE 1149.1 based defect and fault tolerant scan chain for wafer scale integration [Communication écrite]. 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2003), Boston, MA, United states. Lien externe
Lu, M., Savaria, Y., Qiu, B., & Taillefer, J. (novembre 2003). IEEE 1149.1 based defect and fault tolerant scan chain for water safe integration [Communication écrite]. 18th IEEE Symposium on Defect and Fault Tolerance in VLSI Systems, Boston, MA, USA. Lien externe
Lu, M. (2003). Defect tolerance methods and thermally induced skew analysis for wafer scale integration [Mémoire de maîtrise, École Polytechnique de Montréal]. Disponible
