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Defect tolerance methods and thermally induced skew analysis for wafer scale integration

Meng Lu

Master's thesis (2003)

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Uncontrolled Keywords

Circuits intégrés -- Intégration sur la plaquette; Circuits intégrés -- Tolérance aux fautes; Interconnexions (Technologie des circuits intégrés)

Additional Information: Le fichier PDF de ce document a été produit par Bibliothèque et Archives Canada selon les termes du programme Thèses Canada https://canada.on.worldcat.org/oclc/67855689
Department: Department of Electrical Engineering
Academic/Research Directors: Yvon Savaria and Chunyan Wang
PolyPublie URL: https://publications.polymtl.ca/7498/
Institution: École Polytechnique de Montréal
Date Deposited: 04 Aug 2021 11:05
Last Modified: 05 Apr 2024 23:27
Cite in APA 7: Lu, M. (2003). Defect tolerance methods and thermally induced skew analysis for wafer scale integration [Master's thesis, École Polytechnique de Montréal]. PolyPublie. https://publications.polymtl.ca/7498/

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