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Hamad, G. B., Hasan, S. R., Mohamed, O. A., & Savaria, Y. (juin 2014). Abstracting Single Event Transient characteristics variations due to input patterns and fan-out [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2014), Melbourne, VIC, Australia (4 pages). Lien externe
Bany Hamad, G., Hasan, S. R., Mohamed, O. A., & Savaria, Y. (2014). New insights into the single event transient propagation through static and TSPC logic. IEEE Transactions on Nuclear Science, 61(4), 1618-1627. Lien externe
Hamad, G. B., Hasan, S. R., Mohamed, O. A., & Savaria, Y. (septembre 2013). Investigating the impact of propagation paths and re-convergent paths on the propagation induced pulse broadening [Communication écrite]. 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS 2013), Oxford, United kingdom (4 pages). Lien externe
Al-Bayati, Z., Ait Mohamed, O., Hasan, S. R., & Savaria, Y. (mai 2012). A novel hybrid FIFO asynchronous clock domain crossing interfacing method [Communication écrite]. 22nd Great Lakes Symposium on VLSI (GLSVLSI 2012), Salt Lake City, Utah. Lien externe
Bany Hamad, G., Mohamed, O. A., Hasan, S. R., & Savaria, Y. (décembre 2011). SEGP-finder: Tool for identification of soft error glitch-propagating paths at gate level [Communication écrite]. 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2011), Beirut, Lebanon. Lien externe
Hasan, S. R., Pontikakis, B., & Savaria, Y. (mai 2009). An all-digital skew-adaptive clock scheduling algorithm for heterogeneous multiprocessor systems on chips (MPSoCs) [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2009), Taipei, Taiwan. Lien externe
Hasan, S. R., Bélanger, N., & Savaria, Y. (2008). All digital skew tolerant synchronous interfacing methods for high-Performance point-to-point communication in DSM SoCs. (Rapport technique n° EPM-RT-2008-10). Disponible
Hasan, S. R., & Savaria, Y. (mai 2007). Crosstalk Effects in Event-Driven Self-Timed Circuits Designed With 90nm CMOS Technology [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, LA, USA (4 pages). Lien externe
