<  Back to the Polytechnique Montréal portal

All digital skew tolerant synchronous interfacing methods for high-Performance point-to-point communication in DSM SoCs

Syed Rafay Hasan, Normand Bélanger and Yvon Savaria

Technical Report (2008)

[img]
Preview
Published Version
Terms of Use: Tous droits réservés.
Download (1MB)
Cite this document: Hasan, S. R., Bélanger, N. & Savaria, Y. (2008). All digital skew tolerant synchronous interfacing methods for high-Performance point-to-point communication in DSM SoCs (Technical Report n° EPM-RT-2008-10).
Show abstract Hide abstract

Abstract

High-performance clocking of IPs, within a skew budget, is becoming difficult in Deep Sub-Micron technologies. Therefore, the concept of local islands of independent clocks prevails in SoCs, which can communicate using various synchronous and asynchronous interfacing methodologies. However, asynchronous methods are inadequately supported in the context of conventional synchronous design flows, and are also associated with substantial failure rates. By contrast, synchronous interfacing methods often require PLL based synchronization, which requires phase correction that consumes useful bandwidth and mixed signal components. This work proposes a novel and all digital synchronous design method for point-to-point communications, using n interfacing registers and locally delayed clocks with phase adjustments. An overall improvement in skew tolerance of up to n/2 to n times, compared to conventional designs, is obtained depending on the context. This is proven analytically. The modules are assumed to have same or integer multiple frequencies. Gate-level simulations are used to validate the analytical results. A proof of concept implementation of the proposed design is demonstrated using a Virtex-II Pro FPGA from Xilinx.

Uncontrolled Keywords

SoC, Multiple Clock Domains, GALS, Synchronizers, Inter-Module Communication

Open Access document in PolyPublie
Subjects: 2500 Génie électrique et électronique > 2500 Génie électrique et électronique
2500 Génie électrique et électronique > 2506 Circuits et dispositifs électroniques
2500 Génie électrique et électronique > 2513 Transmission des données
Department: Département de génie électrique
Research Center: Non applicable
Date Deposited: 06 Oct 2017 13:35
Last Modified: 24 Oct 2018 16:12
PolyPublie URL: https://publications.polymtl.ca/2632/

Statistics

Total downloads

Downloads per month in the last year

Origin of downloads

Repository Staff Only