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Items where Author is "Gagnon, Yves"

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Number of items: 7.

B

Binet, V., Savaria, Y., Meunier, M., & Gagnon, Y. (2007, May). Modeling the substrate noise injected by a DC-DC converter [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2007), Phoenix-Scottsdale, AZ. External link

G

Gagnon, Y., Meunier, M., & Savaria, Y. (2001). Method and apparatus for iteratively, selectively tuning the impedance of integrated semiconductor devices using a focussed heating source. (Patent no. US6329272). External link

Gagnon, Y., Savaria, Y., Meunier, M., & Thibeault, C. (1997, October). Are defect-tolerant circuits with redundancy really cost-effective? Complete and realistic cost model [Paper]. IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (DFT 1997), Paris, Fr. External link

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Lacourse, A., Ducharme, M., St-Jean, H., Gagnon, Y., Savaria, Y., & Meunier, M. (2009). Tunable semiconductor component provided with a current barrier. (Patent no. US7564078). External link

S

Singh, R., Audet, Y., Gagnon, Y., Savaria, Y., Boulais, E., & Meunier, M. (2011). A laser-trimmed rail-to-rail precision CMOS operational amplifier. IEEE Transactions on Circuits and Systems II: Express Briefs, 58(2), 75-79. External link

Singh, R., Audet, Y., Gagnon, Y., & Savaria, Y. (2007, May). Integrated circuit trimming technique for offset reduction in a precision CMOS amplifier [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, LA, USA. External link

T

Turcotte, D., Ouellette, C., Gagnon, Y., Posada, É., Bourgault, M., & Nollet, J. (2003). Ministère de la Santé et des Services sociaux du Québec : Acquisition d'un système de télécommunications. Revue internationale de cas en gestion, 1(1), 1-7. External link

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