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Modeling, design and implementation of a low-power FPGA based asynchronous wake-up receiver for wireless applications

Jean-François Pons, Jean-Jules Brault and Yvon Savaria

Article (2013)

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Cite this document: Pons, J.-F., Brault, J.-J. & Savaria, Y. (2013). Modeling, design and implementation of a low-power FPGA based asynchronous wake-up receiver for wireless applications. Analog Integrated Circuits and Signal Processing, 77(2), p. 169-182. doi:10.1007/s10470-013-0139-2
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Power consumption is a major concern for wireless sensor networks (WSNs) nodes, and it is often dominated by the power consumption of communication means. For such networks, devices are most of the time battery-powered and need to have very low power consumption. Moreover, for WSNs, limited amount of data are periodically sent and then the radio should be in idle or deep sleep mode most of the time. Thus using event-triggered radios is well suited and could lead to significant reduction of the overall power consumption of WSNs. Therefore this paper explores the design of an asynchronous module that can wake up the main receiver when another node is trying to send data. Furthermore, we implement the proposed solution in an FPGA to decrease the fabrication cost for low volume applications and make it easier to design, re-use and enhance. To decrease the static power consumption, we explore the possibility of reducing the supply voltage. The observed overall power consumption is under 5μW at 250 kbps. Moreover, using a new asynchronous design technique, we observed that power consumption can be further reduced.

Uncontrolled Keywords

Wake-up receiver; Asynchronous; Low-power; Wireless sensor networks; FPGA

Open Access document in PolyPublie
Subjects: 2500 Génie électrique et électronique > 2506 Circuits et dispositifs électroniques
2500 Génie électrique et électronique > 2513 Transmission des données
Department: Département de génie électrique
Research Center: Non applicable
Date Deposited: 07 Dec 2020 14:40
Last Modified: 08 Apr 2021 10:43
PolyPublie URL: https://publications.polymtl.ca/4956/
Document issued by the official publisher
Journal Title: Analog Integrated Circuits and Signal Processing (vol. 77, no. 2)
Publisher: Springer
Official URL: https://doi.org/10.1007/s10470-013-0139-2


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