Olexa Bilaniuk, Sean Wagner, Yvon Savaria
and Jean Pierre David
Paper (2019)
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| Department: | Department of Electrical Engineering |
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| Research Center: | GR2M - Microelectronics and Microsystems Research Group |
| PolyPublie URL: | https://publications.polymtl.ca/43536/ |
| Conference Title: | IEEE International Symposium on Circuits and Systems (ISCAS 2019) |
| Conference Location: | Sapporo, Japan |
| Conference Date(s): | 2019-05-26 - 2019-05-29 |
| Publisher: | IEEE |
| DOI: | 10.1109/iscas.2019.8702332 |
| Official URL: | https://doi.org/10.1109/iscas.2019.8702332 |
| Date Deposited: | 18 Apr 2023 15:01 |
| Last Modified: | 05 Apr 2024 11:41 |
| Cite in APA 7: | Bilaniuk, O., Wagner, S., Savaria, Y., & David, J. P. (2019, May). Bit-slicing FPGA accelerator for quantized neural networks [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2019), Sapporo, Japan (5 pages). https://doi.org/10.1109/iscas.2019.8702332 |
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