Ratioed voter circuit for testing and fault-tolerance in VLSI processing arrays

N. Belabbes, A. Guterman, Yvon Savaria and Michel Dagenais

Paper (1992)

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Department:	Department of Computer Engineering and Software Engineering Department of Electrical Engineering
PolyPublie URL:	https://publications.polymtl.ca/43519/
Conference Title:	IEEE International Symposium on Circuits and Systems (ISCAS 1992)
Conference Location:	San Diego, CA, United states
Conference Date(s):	1992-05-10 - 1992-05-13
Publisher:	IEEE
DOI:	10.1109/iscas.1992.230281
Official URL:	https://doi.org/10.1109/iscas.1992.230281
Date Deposited:	18 Apr 2023 15:26
Last Modified:	25 Sep 2024 16:30

Cite in APA 7:	Belabbes, N., Guterman, A., Savaria, Y., & Dagenais, M. (1992, May). Ratioed voter circuit for testing and fault-tolerance in VLSI processing arrays [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 1992), San Diego, CA, United states. https://doi.org/10.1109/iscas.1992.230281
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