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Reducing fault sensitivity of microprocessor-based systems by modifying workload structure

D. Audet, S. Masson and Yvon Savaria

Paper (1998)

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Department: Department of Electrical Engineering
PolyPublie URL: https://publications.polymtl.ca/40287/
Conference Title: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 1998)
Conference Location: Austin, TX
Conference Date(s): 1998-11-02 - 1998-11-04
Publisher: IEEE
DOI: 10.1109/dftvs.1998.732172
Official URL: https://doi.org/10.1109/dftvs.1998.732172
Date Deposited: 18 Apr 2023 15:22
Last Modified: 25 Sep 2024 16:25
Cite in APA 7: Audet, D., Masson, S., & Savaria, Y. (1998, November). Reducing fault sensitivity of microprocessor-based systems by modifying workload structure [Paper]. IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 1998), Austin, TX. https://doi.org/10.1109/dftvs.1998.732172

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