P. Lavoie, David Haccoun and Yvon Savaria
Article (1994)
An external link is available for this item| Additional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/33109/ |
| Journal Title: | IEEE Transactions on Communications (vol. 42, no. 2/3/4, pt.) |
| Publisher: | IEEE |
| DOI: | 10.1109/tcomm.1994.577044 |
| Official URL: | https://doi.org/10.1109/tcomm.1994.577044 |
| Date Deposited: | 18 Apr 2023 15:25 |
| Last Modified: | 08 Apr 2025 06:54 |
| Cite in APA 7: | Lavoie, P., Haccoun, D., & Savaria, Y. (1994). Systolic architecture for fast stack sequential decoders. IEEE Transactions on Communications, 42(2/3/4, pt.), 324-335. https://doi.org/10.1109/tcomm.1994.577044 |
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