R. Kermouche, D. Audet and Yvon Savaria
Article (1995)
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| Additional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
|---|---|
| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/32100/ |
| Journal Title: | Journal of Microelectronic Systems Integration (vol. 3, no. 1) |
| Date Deposited: | 18 Apr 2023 15:25 |
| Last Modified: | 25 Sep 2024 16:14 |
| Cite in APA 7: | Kermouche, R., Audet, D., & Savaria, Y. (1995). On the optimization of integrated hierarchical bus architectures to achieve efficient fault-tolerance. Journal of Microelectronic Systems Integration, 3(1), 47-63. |
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