Documents publiés en "2023"

Département de génie électrique

Askari Hemmat, M., Dupuis, T., Fournier, Y., El Zarif, N., Cavalcante, M., Perotti, M., Gurkaynak, F., Benini, L., Leduc-Primeau, F., Savaria, Y., & David, J. P. Quark: an integer RISC-V vector processor for sub-byte quantized DNN inference [Communication écrite]. 2023 IEEE International Symposium on Circuits and Systems (ISCAS 2023), Monterey, CA, USA (5 pages). Lien externe

Askari Hemmat, M., Wagner, S., Bilaniuk, O., Hariri, Y., Savaria, Y., & David, J. P. (janvier 2023). BARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU [Communication écrite]. 28th Asia and South Pacific Design Automation Conference (ASP-DAC 2023), Tokyo, Japan. Lien externe

Boyoguéno-Bidias, S.-P., David, J. P., Plamondon, R., & Savaria, Y. (mai 2023). Algorithme de Séparation et Évaluation appliqué au modèle Delta-Lognormal [Présentation]. Dans 90e Congrès de l'ACFAS (ACFAS 2023), Montréal, QC. Lien externe

Chiu, T.-Y., Le Ny, J., & David, J. P. (2023). Temporal logic explanations for dynamic decision systems using anchors and Monte Carlo Tree Search. Artificial Intelligence, 318, 21 pages. Lien externe

Dufour, J., Savaria, Y., & David, J. P. Low-Energy, Scalable, On-demand State-of-charge Estimation System for Li-ion batteries [Communication écrite]. 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS 2023), Edinburgh, United Kingdom (5 pages). Lien externe

Dupuis, T., Fournier, Y., Askari Hemmat, M., El Zarif, N., Leduc-Primeau, F., David, J. P., & Savaria, Y. (juin 2023). Sparq: A Custom RISC-V Vector Processor for Efficient Sub-Byte Quantized Inference [Communication écrite]. 21st IEEE Interregional NEWCAS Conference (NEWCAS 2023), Edinburgh, United Kingdom (5 pages). Lien externe

Ebrahimi, A., Pullu, V. N., Langlois, J. M. P., & David, J. P. Iterative pruning algorithm for efficient look-up table implementation of binary neural networks [Communication écrite]. 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS 2023), Edinburgh, United Kingdom (5 pages). Lien externe

Elbediwy, M., Pontikakis, B., David, J. P., & Savaria, Y. (2023). A Hardware Architecture of a Dynamic Ranking Packet Scheduler for Programmable Network Devices. IEEE Access, 11, 61422-61436. Disponible

Hajizadeh, F., Alavoine, L., Ould-Bachir, T., Sirois, F., & David, J. P. (août 2023). FPGA-based FDNE models for the accurate real-time simulation of power systems in aircraft [Communication écrite]. 12th International Conference on Renewable Energy Research and Application, Oshawa, ON, Canada (5 pages). Lien externe

Département de génie informatique et génie logiciel

Ebrahimi, A., Pullu, V. N., Langlois, J. M. P., & David, J. P. Iterative pruning algorithm for efficient look-up table implementation of binary neural networks [Communication écrite]. 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS 2023), Edinburgh, United Kingdom (5 pages). Lien externe

Hajizadeh, F., Alavoine, L., Ould-Bachir, T., Sirois, F., & David, J. P. (août 2023). FPGA-based FDNE models for the accurate real-time simulation of power systems in aircraft [Communication écrite]. 12th International Conference on Renewable Energy Research and Application, Oshawa, ON, Canada (5 pages). Lien externe